74LVC244APW NXP Semiconductors, 74LVC244APW Datasheet

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74LVC244APW

Manufacturer Part Number
74LVC244APW
Description
Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin TSSOP Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC244APW

Package
20TSSOP
Logic Family
LVC
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
8
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
2.8(Typ)@3.3V ns
Tolerant I/os
5 V
Typical Quiescent Current
0.1 uA
Polarity
Non-Inverting

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1. General description
2. Features
The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE.
A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise
and fall times.
Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can
handle 5 V. These features allow the use of these devices as translators in a mixed
3.3 V and 5 V environment.
The 74LVCH244A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
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74LVC244A; 74LVCH244A
Octal buffer/line driver; 3-state
Rev. 06 — 13 August 2009
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
High-impedance when V
Bus hold on all data inputs (74LVCH244A only)
Complies with JEDEC standard no. 8-1A
ESD protection:
Specified from 40 C to +85 C and 40 C to +125 C
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
= 0 V
Product data sheet

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74LVC244APW Summary of contents

Page 1

Octal buffer/line driver; 3-state Rev. 06 — 13 August 2009 1. General description The 74LVC244A; 74LVCH244A is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74LVC244AD +125 C 74LVCH244AD 74LVC244ADB +125 C 74LVCH244ADB 74LVC244APW +125 C 74LVCH244APW 74LVC244ABQ +125 C 74LVCH244ABQ 74LVC244ABX +125 C 74LVCH244ABX 4. Functional diagram Fig 1. Logic symbol 74LVC_LVCH244A_6 Product data sheet 74LVC244A; 74LVCH244A Name Description SO20 plastic small outline package ...

Page 3

... NXP Semiconductors mna873 Fig 2. IEC logic diagram 74LVC_LVCH244A_6 Product data sheet 74LVC244A; 74LVCH244A Fig 3. Functional diagram Rev. 06 — 13 August 2009 Octal buffer/line driver; 3-state 1A0 1Y0 2 18 1A1 1Y1 4 16 1Y2 1A2 6 14 1A3 1Y3 8 12 1OE 1 2A0 2Y0 17 3 2A1 ...

Page 4

... NXP Semiconductors 5. Pinning information 5.1 Pinning 74LVC244A 74LVCH244A 1OE 1 2 1A0 2Y0 3 1A1 4 5 2Y1 6 1A2 2Y2 7 1A3 8 9 2Y3 GND 10 Fig 4. Pin configuration for SO20 and (T)SSOP20 5.2 Pin description Table 2. Pin description Symbol Pin 1OE, 2OE 1, 19 1A0, 1A1, 1A2, 1A3 ...

Page 5

... NXP Semiconductors 6. Functional description [1] Table 3. Function table Control nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol ...

Page 6

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). ...

Page 7

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input capacitance I I bus hold LOW V BHL CC current I bus hold HIGH V BHH CC current I bus hold LOW V BHLO CC overdrive current I bus hold HIGH V BHHO CC overdrive current ...

Page 8

... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions C power per buffer dissipation capacitance [ the same as t and PLH PHL t is the same as t and PZL PZH t is the same as t and t ...

Page 9

... NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 7. 3-state enable and disable times. Table 8. Measurement points Supply voltage Input 1 2.7 V 2 3.6 V 2.7 V 74LVC_LVCH244A_6 Product data sheet 74LVC244A; 74LVCH244A GND ...

Page 10

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 9. Test data ...

Page 11

... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT339-1 Fig 10. Package outline SOT339-1 (SSOP20) ...

Page 13

... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 14

... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 15

... NXP Semiconductors DHXQFN20U: plastic dual in-line compatible thermal enhanced extremely thin quad flat package; no leads; 20 terminals; UTLP based; body 2.5 x 4.5 x 0.5 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max 0.05 0.30 4.6 mm 0.5 0.00 0.18 4 ...

Page 16

... New SOT1045-1 package outline drawing (DHXQFN20U package). Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type numbers 74LVC244ABX and 74LVCH244ABX (DHXQFN20U package). ...

Page 17

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 18

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 Revision history ...

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