M29DW128G70NF6E NUMONYX, M29DW128G70NF6E Datasheet - Page 13

• Manufacturer Part Number: M29DW128G70NF6E
• Description: P7ED TSOP56 DUAL BANK
• Manufacturer: NUMONYX

M29DW128G
2
2.1
2.2
2.3
2.4
2.5
2.6
Signal descriptions
See
connected to this device.
Address inputs (A0-A22)
The address inputs select the cells in the memory array to access during bus read
operations. During bus write operations they control the commands sent to the command
interface of the program/erase controller.
Data inputs/outputs (DQ0-DQ15)
The data I/O outputs the data stored at the selected address during a bus read operation.
During bus write operations they represent the commands sent to the command interface of
the internal state machine. During bus write operations the command register does not use
DQ8-DQ15 bits that should be also ignored when reading the status register.
Chip Enable (E)
The Chip Enable pin, E, activates the memory, allowing bus read and bus write operations to
be performed. When chip enable is High, V
Output Enable (G)
The Output Enable pin, G, controls the bus read operation of the memory.
Write Enable (W)
The Write Enable pin, W, controls the bus write operation of the memory’s command
interface.
V
The V
use an external high voltage power supply to reduce the time required for program
operations. This is achieved by bypassing the unlock cycles.
The write protect function provides a hardware method of protecting the four outermost
blocks, that is the two 32-kword blocks at the top and the two 32-kword blocks at the bottom
of the address space (see
outermost blocks are protected. Program and erase operations on this block are ignored
while V
PP
Figure 1: Logic diagram
/write protect (V
PP
PP
/write protect pin provides two functions. The V
/write protect is Low.
Section 1:
and
PP
/WP)
Table 1: Signal names
Description). When V
IH
, all other pins are ignored.
PPH
for a brief overview of the signals
PP
function allows the memory to
/write protect is Low, V
Signal descriptions
IL
, the 4
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