ATMEGA64A-MU Atmel, ATMEGA64A-MU Datasheet
ATMEGA64A-MU
Specifications of ATMEGA64A-MU
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ATMEGA64A-MU Summary of contents
Page 1
... Global Pull-up Disable • I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-pad QFN/MLF • Operating Voltages – 2.7 - 5.5V for ATmega64A • Speed Grades – MHz for ATmega64A ® 8-bit Microcontroller (1) 8-bit Microcontroller with 64K Bytes In-System Programmable Flash ...
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... Pin Configuration Figure 1-1. RXD0/(PDI) PE0 (TXD0/PDO) PE1 (XCK0/AIN0) PE2 (OC3A/AIN1) PE3 (OC3B/INT4) PE4 (OC3C/INT5) PE5 (ICP3/INT7) PE7 Note: 8160CS–AVR–07/09 Pinout ATmega64A PEN (T3/INT6) PE6 8 9 (SS) PB0 10 (SCK) PB1 11 (MOSI) PB2 12 (MISO) PB3 13 (OC0) PB4 14 (OC1A) PB5 15 (OC1B) PB6 16 The bottom pad under the QFN/MLF package should be soldered to ground ...
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... Overview The ATmega64A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega64A achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power con- sumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...
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... Atmel ATmega64A is a powerful microcontroller that provides a highly-flexi- ble and cost-effective solution to many embedded control applications. The ATmega64A AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators, and evaluation kits. ...
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... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega64A as listed on 75. 2.3.4 Port B (PB7:PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) ...
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... As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega64A as listed on 83. 2.3.8 Port F (PF7:PF0) Port F serves as the analog inputs to the A/D Converter ...
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... The pullup is shown in 28.2 “DC Characteristics” on page 8160CS–AVR–07/09 , even if the ADC is not used. If the ADC is used, it should be connected Figure 10-1 on page 52 327. PEN has no function during normal operation. ATmega64A Table 28-3 on page CC and its value is given in Section 7 ...
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... A comprehensive set of development tools, application notes and datasheetsare available for download on http://www.atmel.com/avr. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 8160CS–AVR–07/09 1. ATmega64A 8 ...
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... PORTG4 PORTG3 – – DDG4 DDG3 – – PING4 PING3 PORTF6 PORTF5 PORTF4 PORTF3 DDF6 DDF5 DDF4 DDF3 ATmega64A Bit 2 Bit 1 Bit 0 – – – – – – – – – – – – UCSZ11 UCSZ10 UCPOL1 UPE1 U2X1 ...
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... ADSC ADATE ADIF ADIE ADC Data Register High Byte ADC Data Register Low byte PORTE6 PORTE5 PORTE4 PORTE3 DDE6 DDE5 DDE4 DDE3 PINE6 PINE5 PINE4 PINE3 ATmega64A Bit 2 Bit 1 Bit 0 – – – – SP10 SP9 SP8 SP2 SP1 SP0 XDIV2 ...
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... I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 8160CS–AVR–07/09 Bit 6 Bit 5 Bit 4 Bit 3 PINF6 PINF5 PINF4 PINF3 ATmega64A Bit 2 Bit 1 Bit 0 PINF2 PINF1 PINF0 Page 91 11 ...
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... Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared 8160CS–AVR–07/09 ATmega64A Operation Flags Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rdh:Rdl ← Rdh:Rdl + K Z,C,N,V,S Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← ...
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... Set Twos Complement Overflow. CLV Clear Twos Complement Overflow SET Set T in SREG CLT Clear T in SREG SEH Set Half Carry Flag in SREG 8160CS–AVR–07/09 ATmega64A then PC ← None then PC ← None Rd ← Rr None Rd+1:Rd ← Rr+1:Rr None Rd ← K None Rd ← ...
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... Clear Half Carry Flag in SREG MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8160CS–AVR–07/09 ATmega64A H ← None (see specific descr. for Sleep function) None (see specific descr. for WDR/timer) None For On-chip Debug Only None 1 ...
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... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8160CS–AVR–07/09 (2) (1) Ordering Code Package ATmega64A-AU 64A ATmega64A-MU 64M1 Package Type ATmega64A Operation Range Industrial ° ° (- ...
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... Orchard Parkway San Jose, CA 95131 R 8160CS–AVR–07/09 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega64A A2 A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – 1.20 A1 0.05 – ...
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... Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega64A C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX NOTE SYMBOL A 0 ...
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... Errata The revision letter in this section refers to the revision of the ATmega64A device. 9.1 ATmega64A, rev. D • First Analog Comparator conversion may be delayed • Interrupts may be lost when writing the timer registers in the asynchronous timer • Stabilizing time needed when changing XDIV Register • ...
Page 19
... If ATmega64A is the only device in the scan chain, the problem is not visible. Select the Device ID Register of the ATmega64A by issuing the IDCODE instruction or by entering the Test-Logic-Reset state of the TAP controller to read out the contents of its Device ID Register and possibly data from succeeding devices of the scan chain ...
Page 20
... Grades” on page – Added “System and Reset Characteristics” on page – New graphics in “Typical Characteristics” on page – New “Ordering Information” on page ATmega64A (BOD Thresholds Characteristics). “Electrical Characteristics” on page with new V Max (0.9V and 0.6V) and OL 329. ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...