MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 310

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Timer Modules (TIM1 and TIM2)
15.7.11 Timer System Control Register 2
Technical Data
310
NOTE:
Address: TIM1 — 0x00ce_000d
Reset:
Read: Anytime
Write: Anytime
TOI — Timer Overflow Interrupt Enable Bit
PUPT — Timer Pullup Enable Bit
RDPT — Timer Drive Reduction Bit
TCRE — Timer Counter Reset Enable Bit
When the timer channel 3 registers contain $0000 and TCRE is set, the
timer counter registers remain at $0000 all the time.
Read:
Write:
TOI enables timer overflow interrupt requests.
PUPT enables pullup resistors on the timer ports when the ports are
configured as inputs.
RDPT reduces the output driver size.
TCRE enables a counter reset after a channel 3 compare.
Freescale Semiconductor, Inc.
Figure 15-14. Timer System Control Register 2 (TIMSCR2)
For More Information On This Product,
1 = Overflow interrupt requests enabled
0 = Overflow interrupt requests disabled
1 = Pullup resistors enabled
0 = Pullup resistors disabled
1 = Output drive reduction enabled
0 = Output drive reduction disabled
1 = Counter reset enabled
0 = Counter reset disabled
TIM2 — 0x00cf_000d
Bit 7
TOI
0
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
PUPT
5
0
RDPT
4
0
TCRE
3
0
PR2
2
0
MMC2107 – Rev. 2.0
PR1
1
0
MOTOROLA
Bit 0
PR0
0