XC5VLX50T-1FFG665I Xilinx Inc, XC5VLX50T-1FFG665I Datasheet - Page 242
XC5VLX50T-1FFG665I
Manufacturer Part Number
XC5VLX50T-1FFG665I
Description
FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 665-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50T-1FFG665I
Package
665FCBGA
Family Name
Virtex®-5
Device Logic Units
46080
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
360
Ram Bits
2211840
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
665-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50T-1FFG665I
Manufacturer:
XILINX
Quantity:
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Company:
Part Number:
XC5VLX50T-1FFG665I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VLX50T-1FFG665I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
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Chapter 6: SelectIO Resources
242
X-Ref Target - Figure 6-30
Table 6-6
LVCMOS25 I/O standards.
Table 6-6: Allowed Attributes for the LVCMOS33 and LVCMOS25 I/O Standards
Table 6-7
LVCMOS15 I/O standards.
Table 6-7: Allowed Attributes for the LVCMOS18 and LVCMOS15 I/O Standard
IOSTANDARD
DRIVE
SLEW
IOSTANDARD
DRIVE
SLEW
LVCMOS
LVCMOS
Attributes
Attributes
details the allowed attributes that can be applied to the LVCMOS33 and
details the allowed attributes that can be applied to the LVCMOS18 and
IOB
IOB
Figure 6-30: LVCMOS Bidirectional Termination
Note: V
V
www.xilinx.com
TT
R P = Z 0
TT
IBUF/IBUFG
IBUF/IBUFG
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
is any voltage from 0V to V CCO
UNUSED
UNUSED
UNUSED
UNUSED
Z 0
Z 0
R P = Z 0
V
TT
2, 4, 6, 8, 12, 16, 24
OBUF/OBUFT
OBUF/OBUFT
{FAST, SLOW}
2, 4, 6, 8, 12, 16
{FAST, SLOW}
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
Primitives
Primitives
IOB
IOB
LVCMOS
LVCMOS
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
2, 4, 6, 8, 12, 16, 24
{FAST, SLOW}
2, 4, 6, 8, 12, 16
{FAST, SLOW}
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
ug190_6_27_022806
IOBUF
IOBUF
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