XC5VLX50T-1FFG665I Xilinx Inc, XC5VLX50T-1FFG665I Datasheet - Page 11

• Manufacturer Part Number: XC5VLX50T-1FFG665I
• Description: FPGA Virtex®-5 Family 46080 Cells 65nm (CMOS) Technology 1V 665-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-1FFG665I

• Package: 665FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 46080
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 360
• Ram Bits: 2211840
• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 2211840
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 665-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 17: Processor Block DMA0 Switching Characteristics
Table 18: Processor Block DMA1 Switching Characteristics
Table 19: Processor Block DMA2 Switching Characteristics
Table 20: Processor Block DMA3 Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
Clock-to-out and setup relative to clock
T
T
T
T
Clock-to-out and setup relative to clock
T
T
T
T
Clock-to-out and setup relative to clock
T
T
T
T
Clock-to-out and setup relative to clock
T
T
T
T
CK_CONTROL
CK_DATA
CONTROL_CK
DATA_CK
CK_CONTROL
CK_DATA
CONTROL_CK
DATA_CK
CK_CONTROL
CK_DATA
CONTROL_CK
DATA_CK
CK_CONTROL
CK_DATA
CONTROL_CK
DATA_CK
Clock Name
Clock Name
Clock Name
Clock Name
Description
Description
Description
Description
CPMDMA0LLCLK
CPMDMA0LLCLK
CPMDMA0LLCLK
CPMDMA0LLCLK
CPMDMA1LLCLK
CPMDMA1LLCLK
CPMDMA1LLCLK
CPMDMA1LLCLK
CPMDMA2LLCLK
CPMDMA2LLCLK
CPMDMA2LLCLK
CPMDMA2LLCLK
CPMDMA3LLCLK
CPMDMA3LLCLK
CPMDMA3LLCLK
CPMDMA3LLCLK
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Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Reference Clock
Reference Clock
Reference Clock
Reference Clock
–0.105
–0.014
1.256
1.312
0.453
1.127
1.266
0.447
1.101
1.127
0.771
0.135
1.094
1.056
0.636
0.087
-3
-3
-3
-3
Speed Grade
Speed Grade
Speed Grade
Speed Grade
–0.105
1.472
0.558
1.266
1.418
0.555
1.235
1.262
0.924
0.142
1.242
1.184
0.767
0.119
1.42
0.01
-2
-2
-2
-2
–0.104
1.665
1.712
0.716
1.474
1.645
0.717
0.046
1.437
1.463
1.155
0.168
1.462
1.376
0.965
0.116
-1
-1
-1
-1
Units
Units
Units
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
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