DJLXT360LE.A2 Cortina Systems Inc, DJLXT360LE.A2 Datasheet
DJLXT360LE.A2
Specifications of DJLXT360LE.A2
Available stocks
Related parts for DJLXT360LE.A2
DJLXT360LE.A2 Summary of contents
Page 1
Cortina Systems T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Datasheet: Long Form ® The Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications (LXT360 Transceiver fully integrated, combination transceiver for T1/E1 ISDN Primary Rate ...
Page 2
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH CORTINA SYSTEMS NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS ...
Page 3
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Contents 1.0 Pin Assignments and Signal Descriptions ................................................................................. 8 1.1 Mode Dependent Signals ..................................................................................................... 8 2.0 Functional Description................................................................................................................ 14 2.1 Initialization ......................................................................................................................... 14 2.1.1 Reset Operation..................................................................................................... 14 2.2 Transmitter.......................................................................................................................... ...
Page 4
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 4.1 Transmit Return Loss ......................................................................................................... 36 4.2 Transformer Data................................................................................................................ 36 4.3 Application Circuits ............................................................................................................. 36 4.3.1 Hardware Mode Circuit .......................................................................................... 38 4.3.2 Host Mode Circuit .................................................................................................. 40 5.0 Test ...
Page 5
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2 LXT360 Transceiver Pin Assignments ............................................................................................ 8 3 50% Duty Cycle Coding................................................................................................................. 15 4 Serial Port Data Structure.............................................................................................................. 19 5 TAOS with LLOOP ........................................................................................................................ 21 6 Local Loopback ............................................................................................................................. ...
Page 6
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Revision History New Corporate Logo. First release of this document from Cortina Systems, Inc. Initial release. ® Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications ...
Page 7
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 1 LXT360 Transceiver Block Diagram INTERNAL TCLK PATTERN B8ZS/HDB3 GENERATOR TPOS UNIPOLAR (QRSS) ENCODER TNEG MODE QRSS ENCODER ENABLE ENABLE RLOOP NLOOP ENABLE ENABLE TRSTE REMOTE LOOPBACK JASEL ...
Page 8
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 1.0 Pin Assignments and Signal Descriptions Figure 2 LXT360 Transceiver Pin Assignments RPOS / RDATA RNEG / BPV RPOS / RDATA 1.1 Mode Dependent Signals As shown in Figure ...
Page 9
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 1 LXT360 Transceiver Clock and Data Pins by Mode Pin # External Data Modes PLCC QFP Bipolar Mode TPOS 4 43 TNEG ...
Page 10
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 3 LXT360 Transceiver Signal Descriptions (Sheet TPOS/TDATA/ INSLER TNEG/INSBPV MODE 6 3 RNEG/BPV 7 4 RPOS/RDATA ...
Page 11
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 3 LXT360 Transceiver Signal Descriptions (Sheet Pin # Symbol PLCC QFP 8 5 RCLK 9 7 TRSTE 11 10 JASEL 12 13 LOS/ QPD 13 ...
Page 12
... CS is High. Timing is shown in HARDWARE MODES: Remote Loopback. When held High, the clock and data inputs from the framer (TPOS/TNEG or TDATA) are ignored and the data received from the twisted-pair line is transmitted back onto the line at the RCLK frequency. Connect to Midrange ...
Page 13
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 3 LXT360 Transceiver Signal Descriptions (Sheet TAOS/QRSS/ CLKE 11, 12, 14, 17, 22, 10 n/c 23, 26, 28, 30, ...
Page 14
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.0 Functional Description The LXT360 Transceiver is a fully integrated, PCM transceiver for long- or short-haul, 1.544 Mbps (T1) or 2.048 Mbps (E1) applications allowing full-duplex transmission of digital ...
Page 15
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.2.2 Transmit Monitoring The transmitter includes a short circuit limiter that limits the current sourced into a low impedance load. The limiter automatically resets when the load current drops ...
Page 16
... B8ZS or HDB3 decoder or neither. Finally, the device may send the digital data to the framer as either unipolar or bipolar data. When decoding unipolar data to the framer, the LXT360 reports reception of bipolar violations by driving the BPV pin High. During E1 operation in Host mode, the device can be programmed to report HDB3 code violations and Zero Substitution Violations on the BPV pin ...
Page 17
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 device to operate in Monitor mode. Note that the LXT360 Transceiver must be in T1/E1 long-haul receiver mode (set bits CR1.EC4:1 = 0xx0, 1001, or 1010) to enable Monitor ...
Page 18
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 4 on page 19 through a 16-bit word composed of an 8-bit Command/Address byte (bits R/W and A1-A7) and a subsequent 8-bit data byte (bits D0-7). The R/W ...
Page 19
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 4 Serial Port Data Structure CS SCLK Address / Command Byte SDI R High Impedance SDO R Read operation R ...
Page 20
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.7 Diagnostic Mode Operation The LXT360 Transceiver offers multiple diagnostic modes as listed in various diagnostic modes are only available in Host mode. In Hardware mode, the diagnostic modes ...
Page 21
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.7.1 Loopback Modes 2.7.1.1 Local Loopback (LLOOP) See Figure 5 and Figure inputs (TCLK and TPOS/TNEG or TDATA) loop back through the jitter attenuator (if enabled) and appear at ...
Page 22
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 6 Local Loopback 2.7.1.2 Analog Loopback (ALOOP) See Figure 7. Analog loopback (ALOOP) exercises the maximum number of functional blocks. ALOOP operation disconnects the RTIP/RRING inputs from the ...
Page 23
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 7 Analog Loopback 2.7.1.3 Remote Loopback (RLOOP) See Figure 8 on page clock inputs (TCLK and TPOS/TNEG or TDATA), and bypasses the in-line encoders/ decoders. The RPOS/RNEG or ...
Page 24
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 NLOOP is disabled upon reception of the 001 pattern for five seconds activating RLOOP or ALOOP , or by disabling NLOOP detection. Note that the LXT360 Transceiver ...
Page 25
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 9 Dual Loopback 2.7.2 Internal Pattern Generation and Detection 2.7.2.1 Transmit All Ones (TAOS) See Figure 10. When TAOS is active, the transceiver ignores the TPOS and TNEG ...
Page 26
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 With QRSS transmission enabled possible to insert a logic error into the transmit data stream by causing a Low-to-High transition on the INSLER pin. However ...
Page 27
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.7.2.3 In-Band Network Loop Up or Down Code Generator In-band Network Loop Up or Loop Down code transmission is available in Host mode only. The Loop Up code is ...
Page 28
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.7.3.4 Bipolar Violation Detection (BPV) When the internal encoders/decoders are disabled or when configured in Unipolar mode, bipolar violations are reported at the BPV pin. BPV goes High for ...
Page 29
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 2.7.4.2 Alarm Indication Signal Detection (AIS) This function is only available in Host mode. The receiver detects an AIS pattern when it receives fewer than three 0s in any ...
Page 30
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 3.0 Register Definitions The LXT360 Transceiver contains five read/write and three read-only registers that are accessible in Host mode via the serial I/O port. addresses. Only bits A6 through ...
Page 31
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 9 Control Register #1 Read/Write, Address (A7-A0) = x010000x Bit Name 0 EC1 1 EC2 Sets mode (T1 or E1) and equalizer (see 2 EC3 3 EC4 1 ...
Page 32
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 11 Control Register #2 Read/Write, Address (A7-A0) = x010001x Bit Name 1 = Enable Remote loopback mode 1 0 ERLOOP 0 = Disable Remote loopback mode 1 = ...
Page 33
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 13 Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x Bit Name 1 = Clear/Mask Loss of Signal interrupt. 0 CLOS 0 = Enable Loss of Signal interrupt. 1 ...
Page 34
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 15 Performance Status Register Read Only, Address (A7-A0) = x010101x Bit Name 0 LOS 1 NLOOP 2 AIS 3 QRSS 4 − 5 DFMO 6 BIST 7 − ...
Page 35
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 17 Control Register #4 Read/Write, Address (A7-A0) = x010111x (Sheet COL32CM 4 − 5 − 6 − 7 − ® Cortina Systems LXT360 Integrated ...
Page 36
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 4.0 Application Information 4.1 Transmit Return Loss Table 18 shows the specification for transmit return loss in E1 applications. The G.703/CH PTT specification is a Swiss Telecommunications Ministry* specification. ...
Page 37
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 20 Transmit Return Loss (2.048 Mbit/s–Long-Haul) High Return Loss Configuration 1001 Table 21 Transmit Return Loss (2.048 Mbit/s–Long-Haul) EC4:1 1010 Table 22 Transmit Return Loss (1.544 Mbit/s–Long- or ...
Page 38
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 24 Recommended Transformers for LXT360 Transceiver Tx/Rx Turns Ratio 1:1. 53 1:1.15 Tx 1:2 1:2.3 Rx 1:1 4.3.1 Hardware Mode Circuit Figure 12 shows a typical LXT360 Transceiver ...
Page 39
... Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 12 Typical T1/E1 Hardware Mode Application 2.048MHz/ 1.544 MHz TCLK TPOS TNEG T1/E1 Framer RCLK RPOS RNEG 68 μ F 0.1 μ F Notes: 1. See Table 19 through 100 Ω for T 120 Ω for E-1 /120 Ω twisted pair Ω ...
Page 40
... C Excessive capacitance at C Figure 13 Typical T1/E1 Host Mode Application 2.048 MHz/ 1.544 MHz TCLK TPOS TNEG +5 V T1/E1 Framer RCLK RPOS RNEG 68 μF 0.1 μF Notes: 1. See Table 19 t hrough 2. RL =I00 Ω I20 Ω ...
Page 41
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 5.0 Test Specifications Table 25 through Table 35 on page 48 Note: page 52 represent the performance specifications of the LXT360 Transceiver and are guaranteed by test except, where ...
Page 42
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 26 Recommended Operating Conditions Parameter 2 DC supply Ambient operat ing t e mperat ure Short Haul 3 T1 low power Long Haul power Short ...
Page 43
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 27 Digital Characteristics (Sheet Parameter 1 T hree-s tat e leakage cu rrent (all output s) TTIP/TRING leakage curre nt (pins 13 , 16) 1. ...
Page 44
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 28 Analog Characteristics (Sheet Parameter 51 kHz - 102 kHz 102 kHz - 2.048 MH z Receive ret urn loss ( 048 ...
Page 45
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 29 2.048 MHz E1 Pulse Mask Specifications Test load impedance Nominal peak mark voltage Nominal peak space voltage Nominal pulse width Ratio of positive and negative pulse amplitudes ...
Page 46
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 31 T1 Operation Master and Transmit Clock Timing Characteristics Parameter Master clock frequency Master clock tolerance Master clock duty cycle Transmit clock frequency T r ansmit clock t ...
Page 47
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 33 Receive Timing Characteristics for T1 Operation Parameter 2,3 Receive clock dut y cycle 2,3 Receive clock pulse widt h Receive clock pulse widt h high 2,3 Receive ...
Page 48
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Table 35 Serial I/O Timing Characteristics Parameter Ris e/f all t ime—any digit al output ...
Page 49
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 19 Serial Data Output Timing Diagram CLKE = SCLK CS SDO CLKE = SCLK CS SDO Figure 20 ...
Page 50
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 21 Typical E1 Jitter Tolerance 1000 UI 550 100 UI Jitter 1 0.4 UI ...
Page 51
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 22 Typical E1 Jitter Attenuation ® Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 5.0 Test Specifications TM TM Page 51 ...
Page 52
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 23 T1 Jitter Attenuation ® Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 5.0 Test Specifications TM TM Page 52 ...
Page 53
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 6.0 Mechanical Specifications Figure 24 Plastic Leaded Chip Carrier (PLCC) Package Specifications 28-Pin PLCC ® Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI ...
Page 54
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 25 Plastic Quad Flat Package (PQFP) Specifications 44-Pin PQFP ® Cortina Systems LXT360 Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications TM ...
Page 55
LXT360 Transceiver Datasheet: Long Form 249231, Revision 2.1 24 January 2008 Figure 26 Low-Profile Quad Flat Package (LQFP) Specifications 44-Pin LQFP E1/2 E1 Dimension A Dimension A1 Dimension A Dimension ...
Page 56
For additional product and ordering information: www.cortina-systems.com ~ End of Document ~ TM ...