HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 19
HFIXF1110CC
Manufacturer Part Number
HFIXF1110CC
Description
Manufacturer
Intel
Datasheet
1.HFIXF1110CC.pdf
(183 pages)
Specifications of HFIXF1110CC
Number Of Transceivers
1
Screening Level
Commercial
Mounting
Surface Mount
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Lead Free Status / RoHS Status
Not Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cortina Systems Inc
Quantity:
135
Company:
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cypress
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Company:
Part Number:
HFIXF1110CC.B3-998844
Manufacturer:
Cortina Systems Inc
Quantity:
10 000
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4.0
4.1
4.1.1
4.1.2
Datasheet
Ball Assignments and Signal Descriptions
Naming Conventions
Signal Name Conventions
Signal names begin with a Signal Mnemonic, and can also contain one or more of the following
designations: a differential pair designation, a serial designation, and an active Low designation.
Signal naming conventions are as follows:
Differential Pair + Port Designation. The positive and negative components of differential pairs
tied to a specific port are designated by the Signal Mnemonic, immediately followed by an
underscore and either P (positive component) or N (negative component), and an underscore
followed by the port designation. For example, SerDes interface signals for port 0 are identified as
TX_P_0 and TX_N_0.
Serial Designation. A set of signals that are not tied to any specific port are designated by the
Signal Mnemonic, followed by a bracketed serial designation. For example, the set of 11 CPU
Address Bus signals is identified as UPX_ADD[10:0].
Port Designation. Individual signals that apply to a particular port are designated by the Signal
Mnemonic, immediately followed by an underscore and the Port Designation. For example,
Optical module I
Active Low Designation. A control input or indicator output that is active Low is designated by a
final suffix consisting of an underscore followed by an upper case “L”. For example, the CPU cycle
complete identifier is shown as UPX_RDY_L.
Register Address Conventions
Registers located in on-chip memory are accessed using a register address, which is provided in
Hex notation. A Register Address is indicated by the dollar sign ($), followed by the memory
location in Hex.
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
2
C Serial Data signals would be identified as I
Order Number: 250210, Revision: 009
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
2
C_DATA_0, I
2
C_DATA_1, etc.
07-Oct-2005
19
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