NLXT318PE.B5 Intel, NLXT318PE.B5 Datasheet
NLXT318PE.B5
Specifications of NLXT318PE.B5
Related parts for NLXT318PE.B5
NLXT318PE.B5 Summary of contents
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LXT318 E1 NTU/ISDN PRI Transceiver The LXT318 is the first fully integrated transceiver for E1 Network Termination Unit (NTU) and ISDN Primary Rate Interface (ISDN PRI) applications at 2.048 Mbps. The transceiver operates from 0 2 ...
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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. ...
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Contents 1.0 Pin Assignments and Signal Descriptions 2.0 Functional Description 2.1 Transmitter ............................................................................................................ 9 2.1.1 Line Code .................................................................................................9 2.1.2 Idle Mode.................................................................................................. 9 2.1.3 Short Circuit Limit ...................................................................................10 2.2 Receiver ..............................................................................................................10 2.2.1 Jitter Attenuation ....................................................................................10 2.3 Control Modes .....................................................................................................11 2.4 Host ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figures 1 LXT318 Block Diagram ......................................................................................... 5 2 LXT318 Pin Assignments and Package Markings ................................................ 6 3 50% Duty Cycle Coding Diagram.......................................................................... 9 4 LXT318 Line Attenuation (LATN) Pulse Width Encoding.................................... 13 5 LXT318 ...
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Figure 1. LXT318 Block Diagram TCLK TPOS HDB3 TNEG ENCODER Encoder Enable RLOOP Enable XTALIN XTALOUT ATTENUATOR JASEL Decoder REMOTE Enable LOOPBACK RPOS HDB3 DECODER RNEG RCLK INBAND NLOOP NLOOP DETECTOR INT PROCESSOR INT LOS PROCESSOR LOS Datasheet E1 NTU/ISDN ...
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LXT318 — E1 NTU/ISDN PRI Transceiver 1.0 Pin Assignments and Signal Descriptions Figure 2. LXT318 Pin Assignments and Package Markings MCLK TCLK 27 TPOS/TDATA 3 26 TNEG/UBS 4 25 MODE 5 24 RNEG/BPV POS/RDATA ...
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Table 1. Pin Descriptions Pin # Symbol I/O Master Clock. 2.048 MHz clock used to generate internal clocks. Upon Loss of Signal (LOS), 1 MCLK I RCLK is derived from MCLK. If MCLK is not applied, this pin should be ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Table 1. Pin Descriptions (Continued) Pin # Symbol I/O Interrupt (Host Mode). In Host mode, this pin goes Low to flag the host processor when LOS INT O changes state. INT is an open ...
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Functional Description The LXT318 is a fully integrated PCM transceiver for 2.048 Mbps (E1) applications. It allows full- duplex transmission of digital data over existing twisted-pair installations. The LXT318 transceiver interfaces with two twisted-pair lines (one twisted-pair for transmit, ...
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LXT318 — E1 NTU/ISDN PRI Transceiver 2.1.3 Short Circuit Limit The LXT318 transmitter is equipped with a short-circuit limiter. This feature limits to approximately 120 mA RMS the current the transmitter will source into a low-impedance load. The limiter trips ...
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Data (TPOS/TNEG or TDATA; or RPOS/RNEG or RDATA) is clocked into the ES with the associated clock signal (TCLK or RCLK), and clocked out of the ES with the dejittered clock from the JAL. When the bit count in the ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Table 4. SIO Input Bits (See Figure 5) LLOOP TAOS RESET 2.4.1 Serial Input Word Figure 5 shows the Serial Input data structure. The LXT318 is addressed by setting bit A4 in the Address/Command ...
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The transceiver can also be reset from the Host or Hardware mode. In Host mode, command reset by simultaneously writing 1s to RLOOP and LLOOP, and TAOS. In Hardware mode, reset by holding RLOOP and LLOOP High ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figure 5. LXT318 Serial I/O Input Data Structure CS SCLK ADDRESS/COMMAND BYTE SDI R ADDRESS COMMAND R/W A0 BYTE R READ R WRITE CLEAR/MASK INTERRUPTS ...
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Figure 6. LXT318 Serial I/O Output Data Structure CS SCLK ADDRESS/COMMAND BYTE R ADDRESS/ R/W COMMAND BYTE R READ R WRITE LOS NLOOP OUTPUT D0 (LSB) DATA 1 BYTE ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figure 7. LXT318 Interrupt Handling Start-up or Restart Interrupts enabled INT = High (No interrupt) Read Output Word (Bits D5-D7=Operating Mode) LOS Write "1" Input Word to Clear/Mask LOS Interrupt LOS ...
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Diagnostic Mode Operation 2.7.1 Transmit All Ones. See Figure 8A. In Transmit All Ones (TAOS) mode, the TPOS and TNEG inputs to the transceiver are ignored and the transceiver transmits a continuous stream the TCLK frequency. ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figure 9. Local Loopback 2.7.2 Local Loopback. See Figure 9. Local Loopback (LLOOP) is designed to exercise the maximum number of functional blocks. During LLOOP operation, the RTIP/RRING inputs from the line are disconnected. ...
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Figure 10. Remote Loopback TPOS TNEG RCLK RNEG RPOS 2.7.4 Network Loopback Detection. In Host mode, to start the Network Loopback detection mode, write a one to each of RLOOP, LLOOP, and TAOS simultaneously and write all 0s in the ...
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LXT318 — E1 NTU/ISDN PRI Transceiver 3.0 Application Information 3.1 LATN Decoder As shown in Figure for use in line monitoring applications. signal. This circuit uses a 2-bit synchronous counter (half of a 4-bit counter) with synchronous reset, and a ...
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... Figure 12 shows a typical E1 NTU application with the LXT318 operating in the Host mode (MODE pin tied High). The E1/CRC Framer provides the digital interface with the host controller. Both devices are controlled through the serial interface. The 8.192 MHz crystal across XTALIN and XTALOUT enables the JAL that is switched to the transmit side by the Low on JASEL. The power supply pins are tied to a common bus with appropriate decoupling capacitors (68 F and 0.1 µ ...
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... LXT318 — E1 NTU/ISDN PRI Transceiver Figure 12. Typical LXT318 Host Mode E1/NTU, 120 To / From Host Controller E1 CRC4 Framer TCLK TPOS TNEG SPS RNEG RPOS RCLK 2.048 MHz 8.192 MHz 3.3.2 LXT318 Hardware Mode Applications Figure 13 shows a typical 2.048 Mbps application with the LXT318 operating in the Hardware mode ...
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... Figure 13. Typical LXT318 Hardware Mode, 120 E1 FRAMER TCLK TPOS TNEG RNEG RPOS RCLK 8.192 MHz 0.1 F Datasheet E1 NTU/ISDN PRI Transceiver — LXT318 Twisted Pair Application 2.048 MHz Clock LXT318 TRANSCEIVER MCLK TAOS TCLK LLOOP TPOS RLOOP TNEG GND MODE GND RNEG ...
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... LXT318 — E1 NTU/ISDN PRI Transceiver Figure 14. Typical LXT318 Hardware Mode FRAMER TCLK TPOS TNEG RNEG RPOS RCLK 8.192 MHz LOS 0 Coax Application 2.048 MHz Clock LXT318 TRANSCEIVER MCLK TAOS TCLK LLOOP TPOS RLOOP TNEG GND MODE GND RNEG NLOOP RGND RPOS ...
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Test Specifications Note: The minimum and maximum values in represent the performance specifications of the LXT318 and are guaranteed by test, except where noted by design. Table 8. Absolute Maximum Ratings Parameters DC supply (referenced to GND) Input voltage, ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Table 11. Analog Characteristics (Over Recommended Operating Conditions) Parameter Recommended output load at TTIP and TRING AMI output pulse amplitudes 2 Jitter added by the transmitter Input jitter tolerance Jitter attenuation curve corner frequency ...
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Figure 15. LXT318 Transmit Clock Timing TCLK TPOS TNEG Figure 16. LXT318 Receive Clock Timing RCLK RPOS RNEG RPOS RNEG LXT318 Receive Timing Characteristics Table 13. Parameter 2 Receive clock duty cycle 2 Receive clock pulse width Receive clock pulse ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Table 14. LXT318 Serial I/O Timing Characteristics (See Figure 17 and Figure 18) Parameter Rise/fall time—any digital output SDI to SCLK setup time SCLK to SDI hold time SCLK low time SCLK high time ...
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Figure 18. LXT318 Serial Data Output Timing Diagram CS SCLK t CDV SDO CLKE=1 t CDV SDO CLKE=0 Figure 19. LXT318 Jitter Tolerance @ 43 dB (Typical 100 1 0 ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figure 20. LXT318 Jitter Attenuation (Typical 0 -20 dB -30 dB LXT318 Performance - ...
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Figure 21. Input and Maximum Output Jitter Specified by TBR12/13 1.6 1.4 1.2 1.0 0.8 0.6 Input Jitter (Ulpp) Maximum Output Jitter per TBR12/13 0.4 0.2 0 100 Hz Figure 22. LXT318 Jitter Attenuation Performance (Typical–Measured Against TBR12/13) ...
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LXT318 — E1 NTU/ISDN PRI Transceiver Figure 23. 2.048 Mbps Pulse Mask V = 100% 50% 0% Table 15. 2.048 Mbps Pulse Mask Parameters Test load impedance Nominal peak mark voltage Nominal peak space voltage Nominal pulse width Ratio of ...
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Mechanical Specifications Figure 24. Package Specifications Datasheet E1 NTU/ISDN PRI Transceiver — LXT318 28-Pin Plastic Leaded Chip Carrier • Extended Temperature Range ...
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