RC82573L Intel, RC82573L Datasheet

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RC82573L

Manufacturer Part Number
RC82573L
Description
Manufacturer
Intel
Datasheet

Specifications of RC82573L

Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant

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Part Number
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Quantity
Price
Part Number:
RC82573L
Manufacturer:
SANYO
Quantity:
48 000
Part Number:
RC82573L
Manufacturer:
INTEL
Quantity:
20 000
82573 Family of GbE Controllers
Datasheet
Product Features
PCIe*
— x1 PCIe* interface on ICH7 or MCH devices
— Peak bandwidth: 2 Gb/s per direction
— Power management
— High bandwidth density per pin
MAC
— Optimized transmit and receive queues
— IEEE 802.3x compliant flow control with
— Caches up to 64 packet descriptors per queue
— Programmable host memory receive buffers
— 32 KB configurable transmit and receive FIFO
— Mechanism available for reducing interrupts
— Descriptor ring management hardware for
— Optimized descriptor fetching and write-back
— Wide, pipelined internal data path architecture
PHY
— Integrated PHY for 10/100/1000 Mb/s full and
— IEEE 802.3ab auto negotiation support
— IEEE 802.3ab PHY compliance and
— DSP architecture implements digital
Host Offloading
— Transmit and receive IP, TCP and UDP
— Transmit TCP segmentation, IPv6 offloading,
— IEEE 802.1q VLAN support with VLAN tag
— Descriptor ring management hardware for
software controlled pause times and threshold
values
(256 bytes to 16 KB) and cache line size (16
bytes to 256 bytes)
buffer
generated by transmit and receive operation
transmit and receive
mechanisms
half duplex operation
compatibility
adaptive equalization, echo cancellation,
and cross-talk cancellation
checksum off-loading capabilities
and advanced packet filtering
insertion, stripping and packet filtering for up
to 4096 VLAN tags
transmit and receive
Manageability
— Intel® Active Management Technology (Intel®
— Alerting Standards Format 2.0 and advanced
— Boot ROM Preboot eXecution Environment
— Compliance with PCI Power Management 1.1
— Wake on LAN support
Additional
— Three activity and link indication outputs that
— Programmable LEDs
— Internal PLL for clock generation that can use
— Power saving feature for the 82573L. During
— On-chip power control circuitry
— Loopback capabilities
— JTAG (IEEE 1149.1) Test Access Port (TAP)
Technology
— Lead-free 196-pin Thin and Fine Pitch Ball Grid
— Operating temperature: 0° C to 70° C (with
— Operating temperature: 0° to 55° C (with on-
— Storage temperature -40° C to 125° C
AMT) support (82573E only)
pass through support (82573E/V only)
(PXE) Flash interface support
and Advanced Configuration and Power
Interface (ACPI) 2.0 register set compliant
directly drive LEDs
a 25 MHz crystal
the L1 and L2 link states, the 82573L asserts
the Clock Request signal (CLKREQ#) to
indicate that its PCIe* reference clock can be
gated
built in silicon
Array (TF-BGA) package
external regulators)
die 2.5V regulator)
Order Number: 315514-002
Revision 2.5

Related parts for RC82573L

RC82573L Summary of contents

Page 1

... VLAN tags — Descriptor ring management hardware for transmit and receive Manageability — Intel® Active Management Technology (Intel® AMT) support (82573E only) — Alerting Standards Format 2.0 and advanced pass through support (82573E/V only) — Boot ROM Preboot eXecution Environment (PXE) Flash interface support — ...

Page 2

... Intel Corporation (“Intel”). In the event that you do not agree with any of these terms and conditions, do not use or install the Pre-Release Product and promptly return it unused to Intel. ...

Page 3

Datasheet—82573 Contents 1.0 Introduction .............................................................................................................. 7 1.1 Document Scope ................................................................................................. 8 1.2 Reference Documents .......................................................................................... 8 1.3 82573 Architecture ............................................................................................. 9 1.4 Product Codes for the 82573............................................................................... 10 2.0 Signal Descriptions.................................................................................................. 10 2.1 Signal Type Definitions....................................................................................... 10 2.2 PCIe* Data ...

Page 4

Figures 1 82573 Block Diagram................................................................................................. 9 2 Minimum Requirements for Power Supply Sequencing ...................................................20 3 Power Supply Sequencing..........................................................................................21 4 82573 2.5V and 1.2V LVR Schematic ..........................................................................25 5 External Clock Oscillator Connectivity to the 82573 .......................................................29 6 82573 Controller TF-BGA Package ...

Page 5

Datasheet—82573 Tables 1 Absolute Maximum Ratings ....................................................................................... 17 2 Recommended Operating Conditions........................................................................... 17 3 3.3V External Supply Voltage Ramp and Sequencing Recommendations .......................... 18 4 2.5V External Supply Voltage Ramp and Sequencing Recommendations .......................... 18 5 1.2V External Supply Voltage ...

Page 6

... Corrected title Heading June 2006 2.2 Revised Section 3.3, ’PCIe Miscellaneous Feb 2006 2.1 Added Section 5.2, ’Thermal Sept 2005 2.0 Integrated 82573L information into this document. June 2005 1.5 Initial public release. 6 Signals", updated Intel logo. Specifications".” 82573—Datasheet ...

Page 7

... Datasheet—82573 1.0 Introduction Note: Unless specifically noted, 82573 refers to the Intel® 82573E, 82573V and 82573L GbE controllers. 82573 GbE controllers are single, compact components with integrated Gigabit Ethernet Media Access Control (MAC) and Physical Layer (PHY) functions. These devices use PCIe* architecture (Revision 1.0a). For desktop, workstation, and value server network designs with critical space constraints, the 82573 enables a GbE implementation in a very small area ...

Page 8

... Intel Ethernet Controller Timing Device Selection Guide. Intel Corporation. • 82573 NVM Map and Programming Information Guide. Intel Corporation. • 82573/82562 Dual Footprint Design Guide. Intel Corporation. • PCIe* Family of Gigabit Ethernet Controllers Software Developer’s Manual. Intel Corporation. • 82573 Family GbE Controllers Specification Update. Intel Corporation. ...

Page 9

Datasheet—82573 1.3 82573 Architecture Figure 1. 82573 Block Diagram Slave Access Logic Control Status Logic Statistics Note: The 82573L does not support manageability. PCIe* Core DMA Function Descriptor Management Manage- Receive Transmit ability Filters Switch (82573E/ 82573V only) VLA N ...

Page 10

... Product Codes for the 82573 Device Top Marking 82573E RC82573E 82573E PC82573E 82573V RC82573V 82573V PC82573V 82573L RC82573L 82573L PC82573L 2.0 Signal Descriptions 2.1 Signal Type Definitions The signals of the 82573 are electrically defined as follows: Name Input I Standard input only digital signal. ...

Page 11

Datasheet—82573 Name B Input Bias Pull Up PU This signal requires a pull-up resistor. Pull Down PD This signal requires a pull-down resistor. 2.2 PCIe* Data Signals Signal Type PE_CLKn A(In) PE_CLKp PE_T0n A(0ut) PE_T0p PE_R0n A(In) PE_R0p 2.3 PCIe* ...

Page 12

Non-Volatile Memory Interface Signals Signal Type NVM_SI I/O NVM_SO I O NVM_SK TS NVM_CS# I/O NVM_REQ O NVM_PROT I/PU NVM_TYPE I/PU NVM_SHARED# I/PU 2.5 Miscellaneous Signals 2.5.1 Reset and Power-down Signals Signal Type LAN_PWR_ I GOOD DEVICE_OFF ...

Page 13

Datasheet—82573 2.5.2 System Management Bus (SMBus) Signals Note: The signals listed in the following table should not be connected when using an 82573L. Refer to the 82573/82562 Dual Footprint Design Guide reference schematics for more information. Signal Type SMB_CLK I/O ...

Page 14

PHY Analog and Crystal Signals Signal Type MDI0n A MDI0p MDI1n A MDI1p MDI2n A MDI2p MDI3n A MDI3p PHY_REF A XTAL1 I XTAL2 O 14 Name and Function Media Dependent Interface [0] 1000BASE-T: In MDI configuration, MDIp0/MDIn0 corresponds ...

Page 15

Datasheet—82573 2.7 Test Signals 2.7.1 MAC Test Signals Signal Type TEST_EN I ALT_CLK125 NC JTAG_TCK I JTAG_TDI I JTAG_TDO O/OD JTAG_TMS I CLK_VIEW NC TEST[16:0] for the 82573E/V Rsvd TEST[10:0] for the 82573L 2.7.2 PHY Test Signals Signal Type PHY_HSDACn ...

Page 16

... Name and Function Ground These signals connect to ground. VSS is also referred to as GND. No Connect These pins are reserved by Intel and might have factory test functions. For normal operation, do not connect any circuitry to these pins. Do not connect pull-up or pull-down resistors. 82573—Datasheet ...

Page 17

Datasheet—82573 3.0 Voltage, Temperature, and Timing Specifications 3.1 Absolute Maximum Ratings Table 1. Absolute Maximum Ratings Symbol Tstg Storage temperature DC supply voltage on 3.3V pins VCC (3.3) with respect to VSS DC supply voltage on 2.5V pins VCC (2.5) ...

Page 18

External LVR Power Delivery The following power supply requirements apply to designs where the 82573 is supplied by external voltage regulators. These systems do not use the internal regulator logic built into the 82573 as described in Table 3. ...

Page 19

Datasheet—82573 Table 5. 1.2V External Supply Voltage Ramp and Sequencing Recommendations Parameter Rise Time Rise time from 10% to 90% Monotonicity Voltage dip allowed in ramp Ramp rate at any time between 10% to 90% Slope Minimum = (0.8 * ...

Page 20

Figure 2. Minimum Requirements for Power Supply Sequencing Max Difference ≤ 0.3 V • If the 1.2V and 2.5V rails power up before 3.3V, they should never exceed the 3.3V supply by more than 0.3 V. • At power down, ...

Page 21

Datasheet—82573 3.3.4 Internal LVR Power Sequencing All supplies should rise monotonically. Sequencing of the supplies is controlled by the 82573. 3.3.4.1 Power Up Sequencing and Tracking During power up, the sequencing and tracking of the internally controlled supplies (2.5V and ...

Page 22

Internal Voltage Regulators Components for the 82573 Table 7. 82573 Bill of Materials (BOM) of Components for Internal Regulator Description PNP Transistor For 1.2V LVR PNP Transistor For 2.5V LVR 3.3.4.4 2.5V Internal LVR Specification Table 8. 2.5V Internal ...

Page 23

Datasheet—82573 3.3.4.5 1.2V Internal LVR Specification Table 9. 1.2V Internal LVR Specification Parameter Input Voltage Input Voltage Slew Rate Input Capacitance Input Capacitance ESR Load Current Output Voltage Tolerance Output Capacitance Output Capacitance ESR Current Consumption During Power Up Current ...

Page 24

Table 10. PNP Specification (Sheet Symbol Power Maximum Total Power Dissipation Dissipation h DC Current Gain FE f Current Gain Product Bandwidth T 3.3.4.7 Internal LVR Board Schematic When using the internal voltage regulator controllers built into ...

Page 25

... State 1000 Mbps Active S0 (Maximum Power) 1. Maximum conditions refer to fast silicon, high temperature and nominal VCC. 2.5V Voltage Regulator die 2.5V regulator is used 1.2V Voltage Regulator can 82573E Power (mW) with Intel® AMT 1548 82573V Power (mW) without Intel® AMT 1426 25 ...

Page 26

... For 10/100 Mb/s non-stress mode with Intel® AMT, add this number (for example, using IDE-R functionality). 3. For 10/100 Mb/s stress mode active Intel® AMT, add 120 mW to this number (for example, using IDE-R functionality). 4. The current use is slightly higher in the device off state than in the no link state. This occurs since a PHY reset is required in the device off state, which overrides the PHY power down ...

Page 27

Datasheet—82573 Table 14. 82573L Maximum Measured Power Characteristics System State S0 1000 Mb/s Active (Maximum Power) 1. Maximum conditions refer to fast silicon, high temperature and nominal VCC. Table 15. 82573L Measured Power Characteristics System Link State State 1000 Mb/s ...

Page 28

Table 17. LED DC Specifications Symbol Parameter Voh Output High Voltage Vol Output Low Voltage 3-state Output Leakage Ioz Current Ios Output Short Current Cin/out Pin Capacitance 1. Outputs are inputs/outputs in test mode. 2. This parameter is characterized but ...

Page 29

Datasheet—82573 Figure 5. External Clock Oscillator Connectivity to the 82573 Table 19. Specification for External Clock Oscillator Parameter Name Frequency Swing Frequency Tolerance Operating Temperature Aging 3.5.3 Non-Volatile Memory (NVM) Interface: EEPROM Table 20. NVM Interface Timing Specifications for EEPROM ...

Page 30

Table 20. NVM Interface Timing Specifications for EEPROM (Sheet Symbol Parameter Output hold t HO time Output disable t DIS time t Write cycle time WC 1. 50% duty cycle. 4.0 Package and Pinout Information This section ...

Page 31

Datasheet—82573 Figure 7. 82573 Mechanical Specifications 31 ...

Page 32

Thermal Specifications The case temperature ( (⎝ - ⎝ Junction temperature ( ⎝ The power consumption (P) is calculated by using the typical ...

Page 33

Datasheet—82573 Table 21. Thermal Resistance Values Symbol TJ Maximum junction temperature Thermal resistance, junction-to- ⎝ JA ambient Thermal resistance, junction-to- ⎝ JC case Thermal resistances are determined empirically with test devices mounted on standard thermal test boards. Real system designs ...

Page 34

Table 23. PCI Express Miscellaneous Signals Signal PE_RST# P7 CLKREQ# (82573L P9 only) 1. This signal is used in all three devices and has the same functionality but is denoted as AUX_PRESENT in the 82573E/V or AUX_PWR in the 82573L. ...

Page 35

Datasheet—82573 4.3.4 PHY Signals Table 29. Analog and Crystal Signals Signal MDI0n C14 MDI0p C13 MDI1n E14 MDI1p E13 4.3.5 Test Signals Table 30. 82573E/V MAC Test Signals Signal TEST_EN A13 ALT_CLK125 N10 JTAG_TCK N5 JTAG_TDI P4 JTAG_TDO P6 JTAG_TMS ...

Page 36

Table 33. 82573E/V Other Test Signals Signal SDP[0] A8 SDP[ These test signals do not apply to the 82573L. 4.3.6 Power Supply Signals Table 34. Power Support Signals Signal CTRL_25 A4 Table 35. Power Signals Signal VCC33 VCC33 ...

Page 37

Datasheet—82573 Table 36. Ground Signals Signal VSS A1 VSS B3 VSS C2 VSS C10 VSS C12 VSS D2 VSS D4 VSS D5 VSS D6 VSS D7 VSS D8 VSS D13 VSS E2 VSS E4 Table 37. 82573E/V No Connect Signals ...

Page 38

Table 38. 82573L No Connect Signals Signal These test signals do not apply to the 82573E or 82573V devices. 4.4 Visual Pin Assignments VCC25_ 1 VSS PE_T0n PE_TR0p OUT VCC25_ ...

Page 39

Datasheet—82573 Figure 9. 82573L Gigabit Ethernet Controller Pinout VCC25_ 1 VSS PE_T0n OUT VCC3.3_ VCC25_ 2 VSS REG25 OUT VCC3.3_ 3 VSS NC REG25 VCC12 4 CTRL_25 NVM_REQ NVM_ 5 EN25REG VCC12 PROT NVM_ 6 VCC25 AUX_PWR ...

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