LAN9420I-NU Standard Microsystems (SMSC), LAN9420I-NU Datasheet - Page 149
LAN9420I-NU
Manufacturer Part Number
LAN9420I-NU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9420I-NU.pdf
(170 pages)
Specifications of LAN9420I-NU
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
4.6
CONFIGURATION
00h – 3Fh
40h – 74h
OFFSET
SPACE
7Ch
78h
PCI Configuration Space CSR (CONFIG CSR)
Configuration and read back of the CONFIG CSR is accomplished by the Host processor via the PCI
bus. These registers assume their default value on assertion of a chip-level reset or when the device
power state transitions from D3 to D0. See
Registers in offsets 00h - 03Fh are standard PCI header registers, as described in the PCI Local Bus
Specification Revision 3.0. Please refer to the specification for further details.
Register 78h is a PCIB specific extension related to power management.
The following is the register map for the PCI Configuration Space CSR (CONFIG CSR):
Table 4.9 PCI Configuration Space CSR (CONFIG CSR) Address Map
-
RESERVED
PCI_PMC
PCI_PMCSR
REGISTER NAME
DATASHEET
Standard PCI Header Registers (See
for details).
PCI Power Management Capabilities Register (PCI_PMC)
PCI Power Management Control and Status Register
(PCI_PMCSR)
149
Section 3.7, "Power Management," on page 73
DESCRIPTION
Table 4.10 on page 150
Revision 1.4 (12-17-08)
for details.
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