GD82541ER Intel, GD82541ER Datasheet
GD82541ER
Specifications of GD82541ER
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GD82541ER Summary of contents
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... Restriction on Hazardous Substances (RoHS)-banned materials, is available at: ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks In addition, this device has been tested and conforms to the same parametric specifications as previous versions of the device. For more information regarding lead-free products from Intel Corporation, contact your Intel Field Sales represen- tative Datasheet — Automatic polarity detection — ...
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... Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right ...
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Contents 1.0 Introduction ...................................................................................................................... 1 1.1 Document Scope................................................................................................... 1 1.2 Reference Documents...........................................................................................2 1.3 Product Codes....................................................................................................... 2 1.4 Block Diagram ....................................................................................................... 3 2.0 Product Code.................................................................................................................... 5 3.0 Signal Descriptions.......................................................................................................... 7 3.1 Signal Type Definitions.......................................................................................... 7 3.2 PCI Bus Interface Signals (56) ...
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Gigabit Ethernet Controller 5.3 Pinout Information ............................................................................................... 32 5.4 Visual Pin Assignments....................................................................................... 42 Figures 1 82541ER Block Diagram....................................................................................... Test Loads for General Output Pins.............................................................. 23 3 PCI Clock Timing ................................................................................................ 23 4 PCI Bus Interface Output ...
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Serial FLASH Interface Signals...........................................................................33 33 LED Signals.........................................................................................................33 34 Other Signals.......................................................................................................33 35 IEEE Test Signals ...............................................................................................34 36 PHY Signals ........................................................................................................34 37 Test Interface Signals..........................................................................................34 38 Digital Power Signals ..........................................................................................34 39 Analog Power Signals .........................................................................................35 40 Grounds and No Connect Signals.......................................................................35 ...
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... Ethernet Media Access Control (MAC) and physical layer (PHY) functions. For embedded communication and network devices such as web kiosks, and Point-of-Sale terminal designs with critical space constraints, the Intel 82541ER allows for a Gigabit Ethernet implementation in a very small area that is footprint compatible with current generation 10/100 Mbps Fast Ethernet designs. ...
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... Intel Ethernet Controllers Timing Device Selection Guide. Intel Corporation. • PCI Mobile Design Guide, Revision 1.1. PCI Special Interest Group. Software driver developers should contact their local Intel representatives for programming information. 1.3 Product Codes The product ordering codes are: • GD82541ER (leaded device) • LU82541ER (lead-free device) 2 ...
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Block Diagram Slave Slave Access Access Logic Logic Control Control Status Status Logic Logic Statistics Statistics Trellis Viterbi Trellis Viterbi Encoder/Decoder Encoder/Decoder ECHO, NEXT, ECHO, NEXT, FEXT FEXT Cancellers Cancellers AGC, A/D AGC, A/D Timing Timing Recovery Recovery Hybrid ...
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... Product Ordering Codes The product ordering codes for the 82541ER Gigabit Ethernet Controller are: • GD82541ER (leaded device) • LU82541ER (lead-free device) 82541ER Gigabit Ethernet Controller 5 ...
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Signal Descriptions 3.1 Signal Type Definitions The signals of the 82541ER controller are electrically defined as follows: Name I Input. Standard input only digital signal. O Output. Standard output only digital signal. TS Tri-state. Bi-directional tri-state digital input/output signal. ...
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Gigabit Ethernet Controller 3.2.1 PCI Address, Data and Control Signals (44) Symbol Type AD[31:0] TS C/BE#[3:0] TS PAR TS FRAME# STS IRDY# STS TRDY# STS STOP# STS 8 Name and Function Address and Data. Address and data signals are ...
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Symbol Type IDSEL# I DEVSEL# STS VIO P 3.2.2 Arbitration Signals (2) Symbol Type REQ# TS GNT# I 3.2.3 Interrupt Signal (1) Symbol Type INTA# TS 3.2.4 System Signals (3) Symbol Type CLK I M66EN I RST# I 82541ER Gigabit ...
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Gigabit Ethernet Controller 3.2.5 Error Reporting Signals (2) Symbol Type SERR# OD PERR# STS 3.2.6 Power Management Signals (2) Symbol Type LAN_PWR I GOOD AUX_PWR I 3.3 EEPROM and Serial FLASH Interface Signals (9) Symbol Type EEMODE I EEDI ...
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Miscellaneous Signals 3.4.1 LED Signals (4) Symbol LINK_LED# ACTIVITY# LINK100# LINK1000# 3.4.2 Other Signals (4) Symbol Type SDP[3:0] TS PHY Signals 3.5 3.5.1 Crystal Signals (2) Symbol Type XTAL1 I XTAL2 O 82541ER Gigabit Ethernet Controller Type Name and ...
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Gigabit Ethernet Controller 3.5.2 Analog Signals (10) Symbol Type MDI[0]+/- A MDI[1]+/- A MDI[2]+/- A MDI[3]+/- A IEEE_TEST- A IEEE_TEST+ A 3.6 Test Interface Signals (6) Symbol TEST JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST# 12 Name and Function Media Dependent ...
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... For normal operation, do not connect any circuit to these pins. Do not connect pull-up or pull-down resistors. No Connect. This pin is not connected internally. Reserved VCC. This pin is reserved by Intel and may have factory test functions. For normal operation, connect to VCC through a 1K pull-up resistor Name and Function 1 ...
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Voltage, Temperature, and Timing Specifications 4.1 Absolute Maximum Ratings Table 1. Absolute Maximum Ratings Symbol DC supply voltage on 3.3 V pins VDD (3.3) with respect to VSS DC supply voltage on 1.8 V pins VDD (1.8) with respect ...
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Gigabit Ethernet Controller Table 2. Recommended Operating Conditions (Sheet Symbol tr/tf input rise/fall time (Schmitt input) Operating temperature range T A (ambient) T Junction temperature J a. Sustained operation of the device at conditions exceeding these ...
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Table 4. 1.8V Supply Voltage Ramp Maximum voltage ripple at a bandwidth equal Ripple to 50 MHz Overshoot Maximum voltage allowed Output Capacitance range when using PNP circuit Capacitance Input Capacitance range when using PNP circuit Capacitance Capacitance Equivalent series ...
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Gigabit Ethernet Controller 4.3 DC Specifications Table 6. DC Characteristics Symbol Parameter DC supply voltage on 3.3 V VDD (3.3) pins DC supply voltage on 1.8 V VDD (1.8) pins DC supply voltage on 1.2 V VDD (1.2) pins ...
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Table 8. Power Specifications - D3cold unplugged link Typ Icc Max Icc b (mA) (mA Total Device 60 mW Power a. The power consumption for 1000 Mbps is not shown since the controller moves ...
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Gigabit Ethernet Controller Table 10. Power Specifications - Complete Subsystem Complete Subsystem (Reference Design) Including Magnetics, LED, Regulator Circuits D3cold - wake disabled Typ Icc (mA) 1 1.2 V Subsystem 3.3V Current a. Typical conditions: operating temperature ...
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Table 11. I/O Characteristics (Sheet (Continued) Symbol Parameter Output low voltage: VOL 3.3 V PCI Off-state output IOZ leakage current Output short IOS circuit current Input CIN capacitance a. The maximum VIL is 0.6 V for the ...
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Gigabit Ethernet Controller Table 14. Reference Crystal Specification Requirements Specification Vibrational Mode Nominal Frequency Frequency Tolerance Temperature Stability Calibration Mode Load Capacitance Shunt Capacitance Series Resistance, Rs Drive Level Aging Insulation Resistance Table 15. Link Interface Clock Requirements Symbol ...
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Figure 2. AC Test Loads for General Output Pins 4.5 Timing Specifications 4.5.1 PCI Bus Interface 4.5.1.1 PCI Bus Interface Clock Table 18. PCI Bus Interface Clock Parameters Symbol TCYC CLK cycle time TH CLK high time TL CLK low ...
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Gigabit Ethernet Controller 4.5.1.2 PCI/PCI-X Bus Interface Timing Table 19. PCI Bus Interface Timing Parameters Symbol CLK to signal valid delay: bussed TVAL signals CLK to signal valid delay: point- TVAL(ptp) to-point signals TON Float to active delay TOFF ...
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PCI_CLK Input Figure 5. PCI Bus Interface Input Timing Measurement Conditions Table 20. PCI Bus Interface Timing Measurement Conditions Symbol VTH Input measurement test voltage (high) VTL Input measurement test voltage (low) VTEST Output measurement test voltage Input signal slew ...
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Gigabit Ethernet Controller Figure 7. TVAL (max) Falling Edge Test Load Figure 8. TVAL (min) Test Load Figure 9. TVAL Test Load (PCI 5 V Signaling Environment) NOTE: Note load used for maximum times. Minimum times are ...
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Link Interface Timing Table 21. Rise and Fall Times Symbol Parameter TR Clock rise time TF Clock fall time TR Data rise time TF Data fall time Figure 10. Link Interface Rise/Fall Timing 4.5.3 EEPROM Interface Table 22. Link ...
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Package and Pinout Information This section describes the device physical characteristics. The pin number-to-signal mapping is indicated beginning with 5.1 Package Information The 82541ER device is a 196-lead plastic ball grid array (BGA) measuring mm. ...
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Gigabit Ethernet Controller Figure 12. 196 PBGA Package Pad Detail As illustrated in Figure 12, the Ethernet controller package uses solder mask defined pads. The copper area is 0.60 mm and the opening in the solder mask is 0.45mm. ...
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Thermal Specifications The 82541ER device is specified for operation when the ambient temperature (T ° ° range (case temperature) is calculated using the equation (θ C ...
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Gigabit Ethernet Controller 5.3 Pinout Information Table 25. PCI Address, Data and Control Signals Signal AD[0] AD[1] AD[2] AD[3] AD[4] AD[5] AD[6] AD[7] AD[8] AD[9] AD[10] AD[11] AD[12] AD[13] AD[14] AD[15] Table 26. PCI Arbitration Signals Signal REQ# GNT# ...
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Table 29. Error Reporting Signals Signal Pin SERR# A2 Table 30. Power Management Signals Signal LAN_PWR_GOOD AUX_PWR Table 31. Serial EEPROM Interface Signals Signal Pin EESK M10 EEDO N10 Table 32. Serial FLASH Interface Signals Signal FLSH_SCK FLSH_SO/LAN_DISABLE# Table 33. ...
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Gigabit Ethernet Controller Table 35. IEEE Test Signals Signal IEEE_TEST- Table 36. PHY Signals Signal MDI[0]- C14 MDI[0]+ C13 MDI[1]- E14 MDI[1]+ E13 Table 37. Test Interface Signals Signal JTAG_TCK JTAG_TDI Table 38. Digital Power Signals Signal 3.3V A3 ...
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Table 39. Analog Power Signals Signal Pin ANALOG_1.2V E11 ANALOG_1.2V E12 ANALOG_1.2V G13 ANALOG_1.2V H11 Table 40. Grounds and No Connect Signals Signal Pin VSS B3 VSS VSS B7 VSS VSS C10 VSS VSS D5 VSS VSS D6 VSS VSS ...
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Gigabit Ethernet Controller Table 42. Signal Names in Pin Order (Sheet Signal Name NC SERR# 3.3V IDSEL AD[25] NC 3.3V AD[30] LAN_PWR_GOOD a Pull up to VCC 3.3V LINK_LED# TEST NC AD[22] AD[23] VSS AD[24] AD[26] ...
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Table 42. Signal Names in Pin Order (Sheet (Continued) AD[29 Pull up to VCC VSS ACTIVITY# AVSS MDI[0]+ MDI[0]- AD[18] AD[19] AD[20] VSS VSS VSS VSS VSS NC NC ANALOG_1.8V CLKR_1.8V AVSS IEEE_TEST- 3.3V VSS ...
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Gigabit Ethernet Controller Table 42. Signal Names in Pin Order (Sheet (Continued) IRDY# FRAME# C/BE#[2] VSS VSS VSS VSS VSS VSS VSS AVSS NC MDI[2]+ MDI[2]- CLK VIO TRDY# PLL_1.2V 1.2V 1.2V VSS VSS VSS VSS ...
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Table 42. Signal Names in Pin Order (Sheet (Continued) VSS ANALOG_1.2V NC MDI[3]+ MDI[3]- PAR PERR# GNT# EEMODE 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V 1.2V AUX_PWR XTAL_1.8V XTAL2 AD[16] VSS 3.3V 3.3V 1.2V 1.2V 1.2V 1.2V 1.2V ...
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Gigabit Ethernet Controller Table 42. Signal Names in Pin Order (Sheet (Continued) 1.2V VSS NC NC 1.2V 1.2V VSS JTAG_TMS JTAG_TRST# JTAG_TCK AD[11] AD[12] AD[13] C/BE#[0]# AD[5] VSS AD[1] NC FLSH_CE# EESK FLSH_SI SDP[3] JTAG_TDI JTAG_TDO ...
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Table 42. Signal Names in Pin Order (Sheet (Continued) SDP[0] NC 3.3V AD[8] AD[6] AD[3] AD[2] EECS VSS FLSH_SO EEDI CTRL12 3.3V SDP[ Use Ω resistor. 82541ER Gigabit Ethernet Controller N14 P1 ...
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Gigabit Ethernet Controller 5.4 Visual Pin Assignments AD[22] AD[21] AD[18] 2 AD[23] M66EN AD[19] SERR# 3 3.3V VSS REQ# AD[20] 4 C/BE#[3] IDSEL AD[24] VSS 5 AD[25] AD[26] NC VSS 6 NC AD[27] ...
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Absolute Maximum Ratings ................................................................................ 15 2 Recommended Operating Conditions ................................................................ 15 3 3.3V Supply Voltage Ramp................................................................................. 16 4 1.8V Supply Voltage Ramp................................................................................. 16 5 1.2V Supply Voltage Ramp................................................................................. Characteristics.............................................................................................. 18 7 Power Specifications - D0a................................................................................. 18 ...
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Gigabit Ethernet Controller 2 Datasheet ...
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Block Diagram ...................................................................................... Test Loads for General Output Pins ............................................................. 23 2 PCI Clock Timing ................................................................................................ 23 3 PCI Bus Interface Output Timing Measurement ................................................. 24 4 PCI Bus Interface Input Timing Measurement Conditions.................................. 25 ...