SLXT970AQC.B11-831643 Cortina Systems Inc, SLXT970AQC.B11-831643 Datasheet - Page 40

• Manufacturer Part Number: SLXT970AQC.B11-831643
• Manufacturer: Cortina Systems Inc

Specifications of SLXT970AQC.B11-831643

• Number Of Receivers: 1
• Data Rate: 10/100Mbps
• Operating Supply Voltage (typ): 5V
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Mounting: Surface Mount
• Pin Count: 64
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

Intel
2.8.5
2.8.6
2.8.7
2.8.8
2.8.9
40
®
LXT970A Dual-Speed Fast Ethernet Transceiver
100 Mbps and is intended for 100FX applications. It does not support 10FL applications. The
fiber interface does not support the signal detect function supplied by most fiber optic transceivers.
However, the link detection function in the PMA layer quickly detects faults in the fiber link.
Additional Operating Features
Low-Voltage-Fault Detect
The LXT970A Transceiver low-voltage fault detection function prevents transmission of invalid
symbols when VCC goes below normal operating levels. If this condition occurs, the
LXT970A Transceiver disables the transmit outputs and sets 20.2 = 1. Operation is automatically
restored when V
clear the low-voltage fault condition.
Power Down Mode
The LXT970A Transceiver goes into power down mode when PWRDWN is asserted. In this mode,
all functions are disabled except the MDIO. The power supply current is significantly reduced.
This mode can be used for energy-efficient applications or for redundant applications where there
are two devices and one is left as a stand-by. When the LXT970A Transceiver is returned to normal
operation, configuration settings of the MDIO registers are maintained. Refer to
page 47
Software Reset
Software reset causes all state machines to be reset and the LXT970A Transceiver to re-configure
itself to the settings of the hardware configuration pins (MF<4:0>, FDE, CFG0, CFG1).
The LXT970A Transceiver is reset via software(0.15 = 1). This bit setting is maintained while the
reset operation is running. When the reset operation is complete, the LXT70 resets bit 0.15 = 0.
Hardware Reset
Hardware reset causes the LXT970A Transceiver to reset all of its functions and re-configure itself
based on the hardware configuration pin settings.
The LXT970A Transceiver performs a hardware reset when a Low signal is detected at the RESET
pin. All operational conditions must be met for this function to operate. V
and stable, and the RESET signal must be asserted for two cycles of the master input clock. The
LXT970A Transceiver continues to drive an internal reset for a period of 300 μs after the RESET
signal is de-asserted to ensure that all functions start up smoothly. MII registers are not available
and the MDIO output is tri-stated during the internal reset period. Refer to
hardware reset specifications.
for power down specifications.
CC
returns to normal.
Table 26 on page 49
indicates voltage levels that detect and
CC
Table 43 on page 62
must be above 4.75V
Table 22 on
Datasheet
for