SLXT973QC.A2 Intel, SLXT973QC.A2 Datasheet - Page 54
Manufacturer Part Number
Specifications of SLXT973QC.A2
Lead Free Status / RoHS Status
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Figure 19. 100BASE-TX Reception with no Errors
Once the transmit data (or IDLE symbols) are properly encoded, they are scrambled to further
reduce EMI and to spread the power spectrum using an 11-bit scrambler seed. Five-seed bits are
determined by global PHY address, and six-seed bits are selected by the port number. One of the 11
bits must be a “1”.
The scrambler can be bypassed by setting Register bit 16.12 = 1. Scrambler Bypass is provided for
diagnostic and test support.
The descrambler cannot be bypassed. The 100BASE-TX receiver in the LXT973 will not converge
to unscrambled idle, so a descrambler bypass is useless.
100BASE-T Link Failure Criteria and Override
The LXT973 normally transmits 100Mbps data packets only if it detects the link is up, and
transmits only Idle symbols or FLP bursts if the link is not up. Setting Register bit 16.14 = 1
overrides this function, allowing the LXT973 to transmit data packets even when the link is down.
This feature is provided as a diagnostic tool. Note that auto-negotiation must be disabled to
transmit data packets in the absence of link. If auto-negotiation is enabled, the LXT973
automatically begins transmitting FLP bursts if the link goes down.
Baseline Wander Correction
The LXT973 provides a baseline wander correction function which makes the device robust under
all network operating conditions. The MLT3 coding scheme used in 100BASE-TX is by definition
“unbalanced”. This means that the DC average value of the signal voltage can “wander”
significantly over short time intervals (tenths of seconds). This wander can cause receiver errors,
particularly at long line lengths (160 meters). The exact characteristics of the wander are
completely data dependent. “Killer Packets” have been created that exhibit worst case baseline
wander characteristics. The LXT973 baseline wander correction characteristics allow the LXT973
to recover error-free data, even at long line lengths.
Programmable Tx Slew Rate
The LXT973 device supports a slew rate mechanism where one of four pre-selected slew rates can
be used, set either through the input pins or through Register 27.
preamble SFD SFD DA
Rev. Date: March 1, 2002
Document #: 249426
Revision #: 002