XC3S400A-4FTG256C Xilinx Inc, XC3S400A-4FTG256C Datasheet
![FPGA, SPARTAN-3A, 400K, 256FTBGA](/photos/6/71/67101/pk053-256_sml.jpg)
XC3S400A-4FTG256C
Manufacturer Part Number
XC3S400A-4FTG256C
Description
FPGA, SPARTAN-3A, 400K, 256FTBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Ar
Specifications of XC3S400A-4FTG256C
No. Of Logic Blocks
896
No. Of Gates
400000
No. Of Macrocells
8064
Family Type
Spartan-3A
No. Of Speed Grades
4
Total Ram Bits
368640
No. Of I/o's
195
Clock Management
DCM
I/o Supply
RoHS Compliant
Number Of Logic Elements/cells
8064
Number Of Labs/clbs
896
Number Of I /o
195
Number Of Gates
400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1545
Available stocks
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BROADCOM
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Xilinx Inc
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XC3S400A-4FTG256C
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XILINX/赛灵思
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20 000
The Programmable Logic
Challenge of I/O Intensive
Designs
•
•
•
The Xilinx FPGA Solution
•
•
•
Traditional FPGAs are proportionate
between logic and I/O not being cost-
effective for I/O intensive designs
to fast-evolving I/O standards
require low-cost and robust security
solutions
The Spartan
for applications where I/O count and
capabilities matter more than logic density
The Spartan-3A platform delivers up to
502 I/Os with support for industry-leading
26 popular and emerging I/O standards
The industry’s first 90nm FPGA electronic
ID - Device DNA serial number provides
a cost-effective, robust mechanism to help
protect against reverse-engineering,
cloning and overbuilding
System designers need to quickly adapt
High volume consumer applications
™
-3A FPGAs were designed
Xilinx Spartan
The World’s Lowest-Cost I/O Optimized FPGAs
Xilinx is driving the multiple domain-optimized platforms for highly efficient and
optimal design solutions, instead of forcing inefficient, one-size-fits-all solutions on
significantly varying application requirements.
Spartan-3A Platform Key Features
Standard Low-Cost Features
The Spartan-3A FPGA platform is a full feature platform of five devices with
system gates ranging from 50K to 1.4M gates, and I/Os ranging from 108 to 502
I/Os, with density migration. The Spartan-3A FPGAs also support up to 576 Kbits of
fast-block RAM with byte-write enable, and up to 176 Kbits of distributed RAM.
Additionally, there are built-in multipliers for efficient DSP implementation and
Digital Clock Managers (DCMs) for system level clock management functions.
Advance Features
The advance features in the Spartan-3A platform include unique Device DNA
serial number, support for 26 I/O standards, enhanced Multi-Boot capability
with watchdog timer, dual power management modes, and Dynamic Input
Delay for precise data-to-clock centering. These advance features significantly
help shorten design cycles and lower system cost.
™
-3A FPGA Platform
SPARTAN-3 GENERATION FPGAs
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XC3S400A-4FTG256C Summary of contents
Page 1
Xilinx Spartan The Programmable Logic Challenge of I/O Intensive Designs • Traditional FPGAs are proportionate between logic and I/O not being cost- effective for I/O intensive designs • System designers need to quickly adapt to fast-evolving I/O standards • High ...
Page 2
... XC3S200A XC3S400A XC3S700A 195 195 248 251 311 311 372 Corporate Headquarters Xilinx, Inc. 2100 Logic Drive San Jose, CA 95124 Tel: 408-559-7778 Fax: 408-559-7114 Web: www.xilinx.com Europe Headquarters Xilinx Ireland ...