PIC16F1507-E/SS Microchip Technology, PIC16F1507-E/SS Datasheet - Page 117

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE

PIC16F1507-E/SS

Manufacturer Part Number
PIC16F1507-E/SS
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507-E/SS

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC16(L)F1507
13.0
The Fixed Voltage Reference, or FVR, is a stable
voltage reference, independent of V
2.048V or 4.096V selectable output levels. The output
of the FVR can be configured to supply a reference
voltage to the following:
• ADC input channel
The FVR can be enabled by setting the FVREN bit of
the FVRCON register.
FIGURE 13-1:
TABLE 13-1:
DS41586A-page 117
HFINTOSC
BOR
LDO
Peripheral
FIXED VOLTAGE REFERENCE
(FVR)
Any peripheral requiring
FOSC<1:0> = 00 and
IRCF<3:0> = 000x
BOREN<1:0> = 11
BOREN<1:0> = 10 and BORFS = 1
BOREN<1:0> = 01 and BORFS = 1
All PIC16F1507 devices, when
VREGPM = 1 and not in Sleep
the Fixed Reference
FVREN
PERIPHERALS REQUIRING THE FIXED VOLTAGE REFERENCE (FVR)
(See
VOLTAGE REFERENCE BLOCK DIAGRAM
Table
ADFVR<1:0>
Conditions
13-1)
DD
, with 1.024V,
2
+
-
1.024V Fixed
Reference
Preliminary
INTOSC is active and device is not in Sleep.
BOR always enabled.
BOR disabled in Sleep mode, BOR Fast Start enabled.
BOR under software control, BOR Fast Start enabled.
The device runs off of the Low-Power Regulator when in
Sleep mode.
x1
x2
x4
FVRRDY
minimum delay requirement.
13.1
The output of the FVR supplied to the ADC is routed
through a programmable gain amplifier. The amplifier
can be programmed for a gain of 1x, 2x or 4x, to
produce the three possible voltage levels.
The ADFVR<1:0> bits of the FVRCON register are
used to enable and configure the gain amplifier settings
for the reference supplied to the ADC module. Refer-
ence Section 15.0 “Analog-to-Digital Converter
(ADC) Module” for additional information.
13.2
When the Fixed Voltage Reference module is enabled, it
requires time for the reference and amplifier circuits to
stabilize. Once the circuits stabilize and are ready for use,
the FVRRDY bit of the FVRCON register will be set. See
Section 25.0 “Electrical Specifications” for the
Independent Gain Amplifier
FVR Stabilization Period
Description
(To ADC Module)
FVR BUFFER1
 2011 Microchip Technology Inc.

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