PIC16F1507-I/SO Microchip Technology, PIC16F1507-I/SO Datasheet - Page 59

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE

PIC16F1507-I/SO

Manufacturer Part Number
PIC16F1507-I/SO
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507-I/SO

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1507-I/SO
Manufacturer:
MICROCHI
Quantity:
20 000
PIC16(L)F1507
6.12
The Power Control (PCON) register contains flag bits
to differentiate between a:
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Reset Instruction Reset (RI)
• MCLR Reset (RMCLR)
• Watchdog Timer Reset (RWDT)
• Stack Underflow Reset (STKUNF)
• Stack Overflow Reset (STKOVF)
The PCON register bits are shown in
REGISTER 6-2:
DS41586A-page 59
bit 7
Legend:
HC = Bit is cleared by hardware
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W/HS-0/q
STKOVF
Power Control (PCON) Register
STKOVF: Stack Overflow Flag bit
1 = A Stack Overflow occurred
0 = A Stack Overflow has not occurred or cleared by firmware
STKUNF: Stack Underflow Flag bit
1 = A Stack Underflow occurred
0 = A Stack Underflow has not occurred or cleared by firmware
Unimplemented: Read as ‘0’
RWDT: Watchdog Timer Reset Flag bit
1 = A Watchdog Timer Reset has not occurred or set by firmware
0 = A Watchdog Timer Reset has occurred (cleared by hardware)
RMCLR: MCLR Reset Flag bit
1 = A MCLR Reset has not occurred or set by firmware
0 = A MCLR Reset has occurred (cleared by hardware)
RI: RESET Instruction Flag bit
1 = A RESET instruction has not been executed or set by firmware
0 = A RESET instruction has been executed (cleared by hardware)
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset
R/W/HS-0/q
STKUNF
occurs)
PCON: POWER CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
Register
R/W/HC-1/q R/W/HC-1/q
6-2.
RWDT
Preliminary
HS = Bit is set by hardware
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
RMCLR
R/W/HC-1/q
RI
 2011 Microchip Technology Inc.
R/W/HC-q/u
POR
R/W/HC-q/u
BOR
bit 0

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