PIC16F1526T-I/PT Microchip Technology, PIC16F1526T-I/PT Datasheet - Page 88
PIC16F1526T-I/PT
Manufacturer Part Number
PIC16F1526T-I/PT
Description
64-pin, 14KB Flash, 768B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V-
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F1526-EMR.pdf
(354 pages)
Specifications of PIC16F1526T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1526T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F1526T-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16(L)F1526/27
7.6.9
The PIR4 register contains the interrupt flag bits, as
shown in
REGISTER 7-9:
DS41458B-page 88
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CCP10IF
R/W-0/0
Register
PIR4 REGISTER
CCP10IF: CCP10 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP9IF: CCP9 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
RC2IF: USART2 Receive Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TX2IF: USART2 Transmit Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP8IF: CCP8 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP7IF: CCP7 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
BCL2IF: MSSP2 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
SSP2IF: Synchronous Serial Port (MSSP2) Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
7-9.
R/W-0/0
CCP9IF
PIR4: PERIPHERAL INTERRUPT REQUEST REGISTER 4
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
RC2IF
R-0/0
TX2IF
R-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
CCP8IF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
CCP7IF
software
2011 Microchip Technology Inc.
R/W-0/0
BCL2IF
should
ensure
R/W-0/0
SSP2IF
bit 0
the
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