PIC16LF1823-I/ML Microchip Technology, PIC16LF1823-I/ML Datasheet - Page 32
PIC16LF1823-I/ML
Manufacturer Part Number
PIC16LF1823-I/ML
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core, N
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1823-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1823-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC12F/LF1822/PIC16F/LF1823
TABLE 3-8:
DS41413B-page 32
080h
081h
082h
083h
084h
085h
086h
087h
088h
089h
08Ah
08Bh
08Ch
08Dh
08Eh
08Fh
090h
091h
092h
093h
094h
095h
096h
097h
098h
099h
09Ah
09Bh
09Ch
09Dh
09Eh
09Fh
Legend:
Note
Address
Bank 1
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1: These registers can be addressed from any bank.
2: PIC16F/LF1823 only.
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
TRISA
—
TRISC
—
—
PIE1
PIE2
—
—
OPTION_REG
PCON
WDTCON
OSCTUNE
OSCCON
OSCSTAT
ADRESL
ADRESH
ADCON0
ADCON1
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
Shaded locations are unimplemented, read as ‘0’.
(2)
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
A/D Result Register Low
A/D Result Register High
Unimplemented
TMR1GIE
STKOVF
T1OSCR
SPLLEN
WPUEN
OSFIE
ADFM
Bit 7
GIE
—
—
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
STKUNF
INTEDG
C2IE
PLLR
ADIE
Bit 6
PEIE
—
—
—
—
—
—
(2)
ADCS<2:0>
TMR0CS
TMR0IE
TRISA5
TRISC5
OSTS
RCIE
Bit 5
C1IE
—
—
—
IRCF<3:0>
Preliminary
CHS<4:0>
TMR0SE
HFIOFR
TRISA4
TRISC4
INTE
TXIE
EEIE
Bit 4
TO
—
WDTPS<4:0>
TRISA3
TRISC3
SSP1IE
BCL1IE
RMCLR
HFIOFL
IOCIE
Bit 3
PSA
PD
—
TUN<5:0>
BSR<4:0>
MFIOFR
TMR0IF
TRISC2
CCP1IE
TRISA2
Bit 2
—
RI
—
—
Z
GO/DONE
PS<2:0>
TRISC1
TMR2IE
LFIOFR
TRISA1
Bit 1
INTF
POR
2010 Microchip Technology Inc.
DC
—
ADPREF<1:0>
SCS<1:0>
SWDTEN --01 0110 --01 0110
TMR1IE
HFIOFS
TRISA0
TRISC0
ADON
IOCIF
Bit 0
BOR
—
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
--11 1111 --11 1111
--11 1111 --11 1111
0000 0000 0000 0000
0000 0--- 0000 0---
1111 1111 1111 1111
00-- 11qq qq-- qquu
--00 0000 --00 0000
0011 1-00 0011 1-00
10q0 0q00 qqqq qq0q
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
-000 0000 -000 0000
0000 --00 0000 --00
POR, BOR
Value on
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
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