PIC16LF1828T-I/SS Microchip Technology, PIC16LF1828T-I/SS Datasheet - Page 40
PIC16LF1828T-I/SS
Manufacturer Part Number
PIC16LF1828T-I/SS
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F1824-ISL.pdf
(419 pages)
Specifications of PIC16LF1828T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16(L)F1824/1828
TABLE 3-8:
DS41419B-page 40
380h
381h
382h
383h
384h
385h
386h
387h
388h
389h
38Ah
38Bh
38Ch
38Dh
38Eh
38Fh
390h
391h
392h
393h
394h
395h
396h
397h
398h
399h
39Ah
39Bh
39Ch
39Dh
39Eh
39Fh
Legend:
Note
Address
Bank 7
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1: These registers can be addressed from any bank.
2: PIC16F/LF1828 only.
3: PIC16F/LF1824 only.
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
INLVLA
INLVLB
INLVLC
—
—
IOCAP
IOCAN
IOCAF
IOCBP
IOCBN
IOCBF
—
—
—
CLKRCON
—
MDCON
MDSRC
MDCARL
MDCARH
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
Shaded locations are unimplemented, read as ‘0’.
(2)
(2)
(2)
(2)
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
MDMSODIS
MDCHODIS MDCHPOL MDCHSYNC
MDCLODIS
INLVLC7
CLKREN
INLVLB7
IOCBP7
IOCBN7
IOCBF7
MDEN
Bit 7
GIE
—
—
—
—
—
—
—
(2)
Write Buffer for the upper 7 bits of the Program Counter
INLVLC6
MDCLPOL
CLKROE
INLVLB6
IOCBN6
IOCBP6
IOCBF6
MDOE
Bit 6
PEIE
—
—
—
—
—
—
—
(2)
MDCLSYNC
CLKRSLR
INLVLC5
INLVLA5
INLVLB5
TMR0IE
IOCAP5
IOCAN5
IOCAF5
IOCBP5
IOCBN5
IOCBF5
MDSLR
Bit 5
—
—
—
Preliminary
MDOPOL
INLVLA4
INLVLB4
INLVLC4
IOCAP4
IOCAN4
IOCAF4
IOCBP4
IOCBN4
IOCBF4
INTE
Bit 4
TO
—
—
—
CLKRDC<1:0>
INLVLC3
INLVLA3
IOCAP3
IOCAN3
IOCAF3
MDOUT
IOCIE
Bit 3
PD
—
—
—
—
BSR<4:0>
INLVLA2
INLVLC2
TMR0IF
IOCAP2
IOCAN2
IOCAF2
Bit 2
—
—
—
—
—
Z
MDMS<3:0>
MDCH<3:0>
MDCL<3:0>
CLKRDIV<2:0>
INLVLA1
INLVLC1
IOCAN1
IOCAP1
IOCAF1
Bit 1
INTF
2010 Microchip Technology Inc.
DC
—
—
—
—
—
INLVLA0
INLVLC0
IOCAP0
IOCAN0
IOCAF0
MDBIT
IOCIF
Bit 0
—
—
—
—
C
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
--00 0100 --00 0100
0000 ---- 0000 ----
11xx xxxx 11xx xxxx
--00 0000 --00 0000
--00 0000 --00 0000
--00 0000 --00 0000
0000 ---- 0000 ----
0000 ---- 0000 ----
0000 ---- 0000 ----
0011 0000 0011 0000
0010 ---0 0010 ---0
x--- xxxx u--- uuuu
xxx- xxxx uuu- uuuu
xxx- xxxx uuu- uuuu
POR, BOR
Value on
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
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