PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 199

64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE

PIC18F46K22-I/MV

Manufacturer Part Number
PIC18F46K22-I/MV
Description
64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F46K22-I/MV

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Number Of Programmable I/os
36
Number Of Timers
3 x 8-bit. 4 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.4.7
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCPxM<1:0> bits of the CCPxCON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (PxA/PxC and PxB/PxD). The PWM output
polarities must be selected before the PWM pin output
drivers
configuration while the PWM pin output drivers are
enable is not recommended since it may result in
damage to the application circuits.
The PxA, PxB, PxC and PxD output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
FIGURE 14-19:
FIGURE 14-20:
 2010 Microchip Technology Inc.
P1<D:A>
P1<D:A>
STRx
PWM
STRx
PWM
are
START-UP CONSIDERATIONS
enabled.
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRxSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRxSYNC = 1)
Changing
PWM Period
PORT Data
the
polarity
Preliminary
P1n = PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMRxIF bit of the PIR1, PIR2 or
PIR5 register being set as the second PWM period
begins.
P1n = PWM
Note:
PIC18(L)F2X/4XK22
When the microcontroller is released from
Reset, all of the I/O pins are in the high-
impedance state. The external circuits
must keep the power switch devices in the
Off state until the microcontroller drives
the I/O pins with the proper signal levels or
activates the PWM output(s).
PORT Data
PORT Data
DS41412D-page 199

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