PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 341

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.7
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the VREFCON1 register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
REGISTER 22-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1
bit 0
DACEN
R/W-0
Operation During Sleep
DACEN: DAC Enable bit
1 = DAC is enabled
0 = DAC is disabled
DACLPS: DAC Low-Power Voltage Source Select bit
1 = DAC Positive reference source selected
0 = DAC Negative reference source selected
DACOE: DAC Voltage Output Enable bit
1 = DAC voltage level is also an output on the DACOUT pin
0 = DAC voltage level is disconnected from the DACOUT pin
Unimplemented: Read as ‘0’
DACPSS<1:0>: DAC Positive Source Select bits
00 = V
01 = V
10 = FVR BUF1 output
11 = Reserved, do not use
Unimplemented: Read as ‘0’
DACNSS: DAC Negative Source Select bits
1 = V
0 = V
DACLPS
R/W-0
REF
VREFCON1: VOLTAGE REFERENCE CONTROL REGISTER 0
SS
REF
DD
-
+
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
DACOE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0
22.8
A device Reset affects the following:
• DAC is disabled
• DAC output voltage is removed from the
• The DAC1R<4:0> range select bits are cleared
DACOUT pin
DACPSS<1:0>
PIC18(L)F2X/4XK22
Effects of a Reset
R/W-0
U-0
—
DS41412D-page 341
DACNSS
R/W-0
bit 0