PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 55

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 3-3:
 2010 Microchip Technology Inc.
Note 1:
T1OSC or LFINTOSC
Primary Device Clock
2:
3:
4:
(PRI_IDLE mode)
before Wake-up
Clock Source
HFINTOSC
(Sleep mode)
T
required delays (see
Includes both the HFINTOSC 16 MHz source and postscaler derived frequencies.
T
Execution continues during the HFINTOSC stabilization period, T
CSD
OST
None
is the Oscillator Start-up Timer. t
is a required delay when waking from Sleep and all Idle modes and runs concurrently with any other
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
(2)
(1)
Section 3.4 “Idle
after Wake-up
Clock Source
HFINTOSC
HFINTOSC
HFINTOSC
HFINTOSC
LP, XT, HS
LP, XT, HS
LP, XT, HS
LP, XT, HS
EC, RC
EC, RC
EC, RC
EC, RC
HSPLL
HSPLL
HSPLL
HSPLL
PLL
Preliminary
Modes”). On Reset, HFINTOSC defaults to 1 MHz.
is the PLL Lock-out Timer.
(2)
(1)
(1)
(1)
PIC18(L)F2X/4XK22
T
T
T
OST
OST
OST
Exit Delay
T
T
T
T
T
T
T
T
T
IOBST
IOBST
IOBST
None
CSD
OST
CSD
OST
CSD
OST
CSD
+ t
+ t
+ t
(1)
(3)
PLL
(1)
(4)
PLL
(1)
(3)
PLL
(1)
.
(4)
(4)
(3)
(3)
(3)
Clock Ready Status
Bit (OSCCON)
DS41412D-page 55
OSTS
OSTS
OSTS
OSTS
IOSF
IOSF
IOSF
IOSF