PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 84

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
TABLE 5-2:
DS41412D-page 84
FFFh
FFEh
FFDh
FFCh
FFBh
FFAh
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
FEFh
FEEh
FEDh
FECh
FEBh
FEAh
FE9h
FE8h
FE7h
FE6h
FE5h
FE4h
FE3h
FE2h
FE1h
FE0h
FDFh
FDEh
FDDh
FDCh
FDBh
FDAh
FD9h
FD8h
FD7h
FD6h
FD5h
FD3h
FD2h
Legend:
Note
Address
1:
2:
3:
4:
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
OSCCON2
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
PIC18(L)F4XK22 devices only.
PIC18(L)F2XK22 devices only.
PIC18(L)F23/24K22 and PIC18(L)F43/44K22 devices only.
PIC18(L)F26K22 and PIC18(L)F46K22 devices only.
Name
REGISTER FILE SUMMARY FOR PIC18(L)F2X/4XK22 DEVICES
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register) –
GIE/GIEH
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register) –
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) –
TMR0ON
STKFUL
PLLRDY
INT2IP
Uses contents of FSR0 to address data memory – value of FSR0 post-incremented (not a physical register)
Uses contents of FSR0 to address data memory – value of FSR0 post-decremented (not a physical register) ---- ----
Uses contents of FSR0 to address data memory – value of FSR0 pre-incremented (not a physical register)
IDLEN
RBPU
Uses contents of FSR0 to address data memory – value of FSR0 not changed (not a physical register)
Bit 7
Uses contents of FSR1 to address data memory – value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory – value of FSR1 post-incremented (not a physical register) ---- ----
Uses contents of FSR1 to address data memory – value of FSR1 post-decremented (not a physical register) ---- ----
Uses contents of FSR1 to address data memory – value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory – value of FSR2 post-decremented (not a physical register) ---- ----
Uses contents of FSR2 to address data memory – value of FSR2 post-incremented (not a physical register) ---- ----
Uses contents of FSR2 to address data memory – value of FSR2 not changed (not a physical register)
—
—
—
—
—
—
—
—
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented (not a physical register) ---- ----
Indirect Data Memory Address Pointer 0, Low Byte
SOSCRUN
PEIE/GIEL
INTEDG0
STKUNF
T08BIT
INT1IP
Bit 6
—
—
—
—
—
—
—
—
Program Memory Table Pointer Low Byte(TBLPTR<7:0>)
Program Memory Table Pointer High Byte(TBLPTR<15:8>)
Indirect Data Memory Address Pointer 2, Low Byte
Indirect Data Memory Address Pointer 1, Low Byte
IRCF<2:0>
INTEDG1
TMR0IE
T0CS
Bit 5
—
—
—
—
—
—
—
—
—
—
Top-of-Stack, High Byte (TOS<15:8>)
Top-of-Stack, Low Byte (TOS<7:0>)
Preliminary
Program Memory Table Pointer Upper Byte(TBLPTR<21:16>)
Holding Register for PC<15:8>
Working Register
Holding Register for PC<7:0>
Timer0 Register, High Byte
Program Memory Table Latch
Product Register, High Byte
Product Register, Low Byte
Timer0 Register, Low Byte
value of FSR0 offset by W
value of FSR1 offset by W
value of FSR2 offset by W
MFIOSEL
INTEDG2
INT0IE
INT2IE
T0SE
Bit 4
—
—
—
—
N
Top-of-Stack, Upper Byte (TOS<20:16>)
SOSCGO
Indirect Data Memory Address Pointer 0, High Byte
Indirect Data Memory Address Pointer 1, High Byte
Indirect Data Memory Address Pointer 2, High Byte
INT1IE
OSTS
RBIE
Bit 3
PSA
Holding Register for PC<20:16>
OV
—
STKPTR<4:0>
TMR0IF
TMR0IP
HFIOFS
Bank Select Register
PRISD
Bit 2
—
Z
 2010 Microchip Technology Inc.
T0PS<2:0>
MFIOFS
INT0IF
INT2IF
Bit 1
DC
—
SCS<1:0>
LFIOFS
INT1IF
RBIF
RBIP
Bit 0
C
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
---- ----
---- ----
---- ----
---- ----
---- 0000
xxxx xxxx
xxxx xxxx
---- ----
---- ----
---- ----
---- 0000
xxxx xxxx
---- 0000
---- ----
---- ----
---- 0000
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0011 q000
00-0 01x0
POR, BOR
Value on