PIC18F87K90-E/PT Microchip Technology, PIC18F87K90-E/PT Datasheet - Page 108
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F87K90-E/PT
Manufacturer Part Number
PIC18F87K90-E/PT
Description
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TR
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F87K90-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F87K90-E/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18F87K90-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
FIGURE 6-9:
DS39957D-page 108
EXAMPLE INSTRUCTION: ADDWF, f, d, a (Opcode: 0010 01da ffff ffff)
When a = 0 and f 60h:
The instruction executes in
Direct Forced mode. ‘f’ is
interpreted as a location in the
Access RAM, between 060h
and FFFh. This is the same as
locations,
(Bank 15), of data memory.
Locations below 060h are not
available in this addressing
mode.
When a = 0 and f5Fh:
The instruction executes in
Indexed Literal Offset mode. ‘f’
is interpreted as an offset to the
address value in FSR2. The
two are added together to
obtain the address of the target
register for the instruction. The
address can be anywhere in
the data memory space.
Note that in this mode, the
correct syntax is now:
ADDWF [k], d
where ‘k’ is the same as ‘f’.
When a = 1 (all values of f):
The instruction executes in
Direct mode (also known as
Direct Long mode). ‘f’ is
interpreted as a location in
one of the 16 banks of the data
memory space. The bank is
designated by the Bank Select
Register (BSR). The address
can be in any implemented
bank in the data memory
space.
F60h
COMPARING ADDRESSING OPTIONS FOR BIT-ORIENTED AND
BYTE-ORIENTED INSTRUCTIONS (EXTENDED INSTRUCTION SET ENABLED)
to
FFFh
FFFh
FFFh
FFFh
F00h
F40h
F00h
F40h
F00h
F40h
000h
060h
100h
000h
060h
100h
000h
060h
100h
Data Memory
Data Memory
Data Memory
Bank 14
Bank 15
Bank 14
Bank 15
Bank 14
Bank 15
through
through
through
Bank 0
Bank 1
Bank 0
Bank 1
Bank 0
Bank 1
SFRs
SFRs
SFRs
2009-2011 Microchip Technology Inc.
001001da
00000000
001001da
BSR
Access RAM
FSR2H
ffffffff
ffffffff
FSR2L
00h
60h
FFh
Valid Range
for ‘f’
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