PIC18F87K90-E/PT Microchip Technology, PIC18F87K90-E/PT Datasheet - Page 270
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PIC18F87K90-E/PT
Manufacturer Part Number
PIC18F87K90-E/PT
Description
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TR
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F87K90-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F87K90-E/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC18F87K90-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
FIGURE 19-16:
FIGURE 19-17:
FIGURE 19-18:
DS39957D-page 270
Note 1: PORT outputs are configured as displayed
P1<D:A>
PORT Data
PORT Data
PORT Data
PORT Data
PxA Signal
P1<D:A>
STRn
CCPxM1
CCPxM0
CCPxM1
CCPxM0
PWM
STRn
STRC
STRD
PWM
STRA
STRB
2: Single PWM output requires setting at least
when
PxM<1:0> = 00 and CCP1Mx<3:2> = 11.
one of the STRx bits.
the
PORT Data
SIMPLIFIED STEERING
BLOCK DIAGRAM
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION (STRSYNC = 1)
CCPxCON
1
0
1
0
1
0
1
0
PORT Data
PWM Period
TRIS
TRIS
TRIS
TRIS
register
Output Pin
Output Pin
Output Pin
Output Pin
bits,
P1n = PWM
19.4.7.1
The STRSYNC bit of the PSTRxCON register gives the
user two choices for when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRxCON register. In this case, the out-
put signal at the Px<D:A> pins may be an incomplete
PWM waveform. This operation is useful when the user
firmware needs to immediately remove a PWM signal
from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
19-17
Steering Synchronization
and
2009-2011 Microchip Technology Inc.
19-18
illustrate the timing diagrams
PORT Data
PORT Data
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