PIC24F32KA302-E/SP Microchip Technology, PIC24F32KA302-E/SP Datasheet - Page 13
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PIC24F32KA302-E/SP
Manufacturer Part Number
PIC24F32KA302-E/SP
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SPDIP .300in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.PIC24F16KA301T-ISO.pdf
(320 pages)
Specifications of PIC24F32KA302-E/SP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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1.0
This document contains device-specific information for
the following devices:
• PIC24FV16KA301, PIC24F16KA301
• PIC24FV16KA302, PIC24F16KA302
• PIC24FV16KA304, PIC24F16KA304
• PIC24FV32KA301, PIC24F32KA301
• PIC24FV32KA302, PIC24F32KA302
• PIC24FV32KA304, PIC24F32KA304
The PIC24FV32KA304 family introduces a new line of
extreme low-power Microchip devices. This is a 16-bit
microcontroller family with a broad peripheral feature
set and enhanced computational performance. This
family also offers a new migration option for those
high-performance
outgrowing their 8-bit platforms, but do not require the
numerical processing power of a digital signal
processor.
1.1
1.1.1
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchip’s
dsPIC
offers a wide range of enhancements, such as:
• 16-bit data and 24-bit address paths with the
• Linear addressing of up to 12 Mbytes (program
• A 16-element working register array with built-in
• A 17 x 17 hardware multiplier with support for
• Hardware support for 32-bit by 16-bit division
• An instruction set that supports multiple
• Operational performance up to 16 MIPS
2011 Microchip Technology Inc.
ability to move information between data and
memory spaces
space) and 64 Kbytes (data)
software stack support
integer math
addressing modes and is optimized for high-level
languages, such as C
®
digital signal controllers. The PIC24F CPU core
DEVICE OVERVIEW
Core Features
16-BIT ARCHITECTURE
applications,
which
may
PIC24FV32KA304 FAMILY
be
1.1.2
All of the devices in the PIC24FV32KA304 family
incorporate a range of features that can significantly
reduce power consumption during operation. Key
features include:
• On-the-Fly Clock Switching: The device clock
• Doze Mode Operation: When timing-sensitive
• Instruction-Based Power-Saving Modes: There
1.1.3
The PIC24FV32KA304 family offers five different
oscillator options, allowing users a range of choices in
developing application hardware. These include:
• Two Crystal modes using crystals or ceramic
• Two External Clock modes offering the option of a
• Two fast internal oscillators (FRCs): One with a
• A Phase Locked Loop (PLL) frequency multiplier,
• A separate internal RC oscillator (LPRC) with a
can be changed under software control to the
Timer1 source or the internal, low-power RC
oscillator during operation, allowing users to
incorporate power-saving ideas into their software
designs.
applications, such as serial communications,
require the uninterrupted operation of peripherals,
the CPU clock speed can be selectively reduced,
allowing incremental power savings without
missing a beat.
are three instruction-based power-saving modes:
- Idle Mode: The core is shut down while leaving
- Sleep Mode: The core and peripherals that
- Deep Sleep Mode: The core, peripherals
resonators.
divide-by-2 clock output.
nominal 8 MHz output and the other with a
nominal 500 kHz output. These outputs can also
be divided under software control to provide clock
speed as low as 31 kHz or 2 kHz.
available to the External Oscillator modes and the
8 MHz FRC oscillator, which allows clock speeds
of up to 32 MHz.
fixed 31 kHz output, which provides a low-power
option for timing-insensitive applications.
the peripherals active.
require the system clock are shut down, leaving
the peripherals that use their own clock, or the
clock from other devices, active.
(except RTCC and DSWDT), Flash and SRAM
are shut down.
POWER-SAVING TECHNOLOGY
OSCILLATOR OPTIONS AND
FEATURES
DS39995B-page 13
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