PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 167

• Manufacturer Part Number: PIC24HJ64GP510A-E/PF
• Description: 16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.0
The Inter-Integrated Circuit (I
complete hardware support for both Slave and Multi-
Master modes of the I
standard, with a 16-bit interface.
The PIC24HJXXXGPX06A/X08A/X10A devices have
up to two I
I2C2. Each I
pin is clock and the SDAx pin is data.
Each I
features:
• I
• I
• I
• I
• Serial clock synchronization for I
• I
 2009 Microchip Technology Inc.
operation.
master and slaves.
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
collision and will arbitrate accordingly.
2
2
2
2
2
Note 1: This data sheet summarizes the features
C interface supporting both master and slave
C Slave mode supports 7 and 10-bit address.
C Master mode supports 7 and 10-bit address.
C Port allows bidirectional transfers between
C supports multi-master operation; detects bus
2
C module ‘x’ (x = 1 or 2) offers the following key
2: Some registers and associated bits
INTER-INTEGRATED
CIRCUIT™ (I
2
C interface modules, denoted as I2C1 and
2
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended
reference source. To complement the
information in this data sheet, refer to
Section 19. “Inter-Integrated Circuit™
(I
PIC24H
which is available from the Microchip
website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
C module has a 2-pin interface: the SCLx
2
C™)” (DS70235) of the “dsPIC33F/
Family
to
2
2
C serial communication
C™)
be
PIC24HJXXXGPX06A/X08A/X10A
2
Reference
C) module provides
a
2
C port can be
comprehensive
Manual”,
Preliminary
17.1
The hardware fully implements all the master and slave
functions of the I
specifications, as well as 7 and 10-bit addressing.
The I
master on an I
The following types of I
• I
• I
• I
For details about the communication sequence in each
of these modes, please refer to the “dsPIC33F/PIC24H
Family Reference Manual”.
17.2
I2CxCON and I2CxSTAT are control and status
registers, respectively. The I2CxCON register is
readable and writable. The lower six bits of I2CxSTAT
are read-only. The remaining bits of the I2CSTAT are
read/write.
I2CxRSR is the shift register used for shifting data,
whereas I2CxRCV is the buffer register to which data
bytes are written, or from which data bytes are read.
I2CxRCV is the receive buffer. I2CxTRN is the transmit
register to which bytes are written during a transmit
operation.
The I2CxADD register holds the slave address. A
status bit, ADD10, indicates 10-bit Address mode. The
I2CxBRG acts as the Baud Rate Generator (BRG)
reload value.
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV
and an interrupt pulse is generated.
2
2
2
C slave operation with 7-bit address
C slave operation with 10-bit address
C master operation with 7 or 10-bit address
2
C module can operate either as a slave or a
Operating Modes
I
2
C Registers
2
C bus.
2
C Standard and Fast mode
2
C operation are supported:
DS70592B-page 167