PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 31

• Manufacturer Part Number: PIC24HJ64GP510A-E/PF
• Description: 16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.0
The PIC24HJXXXGPX06A/X08A/X10A architecture
features separate program and data memory spaces
and buses. This architecture also allows the direct
access of program memory from the data space during
code execution.
FIGURE 4-1:
 2009 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to Section 3. “Data
Memory” (DS70237) of the “dsPIC33F/
PIC24H Family Reference Manual”, which
is available from the Microchip website
(www.microchip.com).
Alternate Vector Table
Interrupt Vector Table
PIC24HJ64XXXXXA
Device Configuration
(22K instructions)
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
PROGRAM MEMORY MAP FOR PIC24HJXXXGPX06A/X08A/X10A FAMILY DEVICES
(Read ‘0’s)
Reserved
Registers
DEVID (2)
Reserved
Reserved
PIC24HJXXXGPX06A/X08A/X10A
PIC24HJ128XXXXXA
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(44K instructions)
GOTO Instruction
Unimplemented
Reset Address
Preliminary
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Registers
Reserved
Reserved
Reserved
4.1
The
PIC24HJXXXGPX06A/X08A/X10A devices is 4M instruc-
tions. The space is addressable by a 24-bit value derived
from either the 23-bit Program Counter (PC) during pro-
gram execution, or from table operation or data space
remapping as described in Section 4.4 “Interfacing Pro-
gram and Data Memory Spaces”.
User access to the program memory space is restricted
to the lower half of the address range (0x000000 to
0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space.
Memory maps for the PIC24HJXXXGPX06A/X08A/
X10A family of devices are shown in Figure 4-1.
program
Program Address Space
PIC24HJ256XXXXXA
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(88K instructions)
GOTO Instruction
Unimplemented
Reset Address
address
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Reserved
Registers
Reserved
Reserved
memory
DS70592B-page 31
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x00ABFE
0x00AC00
0x0157FE
0x015800
0x02ABFE
0x02AC00
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80017
0xF80010
0xFEFFFE
0xFF0000
0xFFFFFE
space
of
the