SST39WF1601-70-4I-MAQE-T Microchip Technology, SST39WF1601-70-4I-MAQE-T Datasheet
SST39WF1601-70-4I-MAQE-T
Specifications of SST39WF1601-70-4I-MAQE-T
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SST39WF1601-70-4I-MAQE-T Summary of contents
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... Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed typical endurance of 100,000 cycles. Data retention is rated at greater than 100 years. The SST39WF1601/1602 devices are suited for applica- tions that require convenient and economical updating of ©2011 Silicon Storage Technology, Inc. S71297-06-000 ...
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... CE#, whichever occurs last. The data bus is latched on the rising edge of WE# or CE#, whichever occurs first. The SST39WF1601/1602 also have the Auto Low Power mode which puts the device in a near standby mode after data has been accessed with a valid Read operation. This ...
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... Write cycle, otherwise the rejection is valid. Data# Polling ( When the SST39WF1601/1602 are in the internal Pro- gram operation, any attempt to read DQ complement of the true data. Once the Program operation is completed, DQ will produce true data. Note that even ...
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... Data Protection The SST39WF1601/1602 provide both hardware and soft- ware features to protect nonvolatile data from inadvertent writes. Hardware Data Protection Noise/Glitch Protection: A WE# or CE# pulse of less than 5 ns will not initiate a write cycle. ...
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... Erase operation. See Table 6 for software command codes, Figure 14 for timing waveform, and Figures 22 and 23 for flowcharts. Security ID The SST39WF1601/1602 devices offer a 256-bit Security ID space. The Secure ID space is divided into two 128-bit segments - one factory programmed segment and one user programmed segment. The first segment is pro- grammed and locked at SST with a random 128-bit num- ber ...
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... A10 A11 DQ7 DQ14 DQ13 RST# NC A19 DQ5 DQ12 V DD WP# A18 NC DQ2 DQ10 DQ11 A17 A6 A5 DQ0 DQ8 DQ9 CE# OE 1297 48-tfbga B3K P1.1 6 SST39WF1601 / SST39WF1602 SuperFlash Memory Y-Decoder I/O Buffers and Data Latches 1297 B1 DQ6 DQ4 DQ3 DQ1 S71297-06-000 01/11 ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 CE FIGURE 3: Pin assignments for 48-ball WFBGA ©2011 Silicon Storage Technology, Inc. TOP VIEW (balls facing down) SST39WF160x A4 A6 A17 NC NC WE# RST WP# NC A10 A5 A18 A8 DQ8 DQ10 DQ4 OE# DQ9 A19 NC DQ5 DQ0 DQ1 DQ2 DQ3 V DQ12 ...
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... Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus -A address lines will select the sector address lines will select the block OE# WE OUT High High OUT High OUT SST39WF1601 / SST39WF1602 Address Sector or block address, XXH for Chip-Erase See Table 6 S71297-06-000 T4.0 1297 T5.0 1297 01/11 ...
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... A5H 2AAAH 55H 5555H 85H 2AAAH 55H 5555H 90H 2AAAH 55H 5555H 98H 2AAAH 55H 5555H F0H , but no other value, for Command sequence for SST39WF1601/1602. address lines address lines - (Address range = 000000H to 000007H (Address range = 000008H to 00000FH 0000FFH. Unlocked Locked ...
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... Block Information ( Number of blocks 256B = block size) 32H 0000H blocks (001F = 31) 33H 0000H 34H 0001H z = 256 x 256 Bytes = 64 KByte/block (0100H = 256) ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 1 -DQ : 100 millivolts 3 0 -DQ : 100 millivolts 3 0 pin) PP ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...
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... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a END higher minimum specification. ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 1 = 1.65-1.95V DD Limits Min Max ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 AC CHARACTERISTICS TABLE 14: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output OLZ 1 T CE# High to High-Z Output ...
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... DATA VALID INTERNAL PROGRAM OPERATION STARTS 2AAA 5555 ADDR XX55 XXA0 DATA SW1 SW2 WORD (ADDR/DATA µs prior to and 1µs after the command sequence but no other value. 14 SST39WF1601 / SST39WF1602 OHZ T T CHZ OH HIGH-Z DATA VALID 1297 F03 1297 F04.1 S71297-06-000 01/11 ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 ADDRESS A 19-0 5555 CE OE# WE# DQ 15-0 XXAA SW0 Note: WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 6: CE# Controlled Program Cycle Timing Diagram ADDRESS A 19-0 CE# OE# WE# DATA DQ 7 FIGURE 7: Data# Polling Timing Diagram © ...
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... SIX-BYTE CODE FOR CHIP-ERASE 5555 5555 2AAA XX55 XX80 XXAA XX55 SW1 SW2 SW3 SW4 ) 1 µs prior to and 1µs after the command sequence SST39WF1601 / SST39WF1602 T OES TWO READ CYCLES 1297 F07.1 WITH SAME OUTPUTS T SCE 5555 XX10 SW5 1297 F08.1 S71297-06-000 01/11 ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 ADDRESS A 5555 19-0 CE# OE WE# DQ XXAA 15-0 SW0 Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 15 Block Address X WP# must be held in proper logic state (V ...
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... XXAA 15-0 SW0 Note: WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 13: CFI Query Entry and Read ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 5555 0000 T IDA T WPH T AA XX55 XX90 00BF SW1 ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 THREE-BYTE SEQUENCE FOR SOFTWARE ID EXIT AND RESET ADDRESS A 5555 2AAA 14-0 DQ XXAA 15-0 CE# OE WE# SW0 Note: WP# must be held in proper logic state (V X can but no other value. IL IH, FIGURE 14: Software ID Exit/CFI Exit THREE-BYTE SEQUENCE FOR CFI QUERY ENTRY ...
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... RST# CE#/OE# FIGURE 16: RST# Timing Diagram (When no internal operation is in progress RST# CE#/OE# FIGURE 17: RST# Timing Diagram (During Program or Erase operation) ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 T RHR T RY End-of-Write Detection (Toggle-Bit) 20 1297 F22.0 1297 F23.1 ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 18: AC Input/Output Reference Waveforms TO DUT 1297 F15.1 FIGURE 19: A Test Load Example ©2011 Silicon Storage Technology, Inc. V REFERENCE POINTS IT ) for a logic “ ...
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... Data Sheet FIGURE 20: Word-Program Algorithm ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 Start Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XXA0H Address: 5555H Load Word Address/Word Data Wait for end of Program ( Data# Polling ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 21: Wait Options ©2011 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match Yes Program/Erase Completed 23 Data Sheet Data# Polling ...
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... Load data: XX55H Address: 2AAAH Load data: XX88H Address: 5555H Wait T IDA Wait T IDA Read Sec ID X can but no other value 24 SST39WF1601 / SST39WF1602 Software Product ID Entry Command Sequence Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XX90H Address: 5555H ...
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... Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 Load data: XXAAH Load data: XX55H Address: 2AAAH Load data: XXF0H Return to normal FIGURE 23: Software ID/CFI Exit Command Flowcharts ©2011 Silicon Storage Technology, Inc. Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: XXF0H Address: 5555H ...
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... Load data: XX10H Address: 5555H Wait T SCE Chip erased to FFFFH FIGURE 24: Erase Command Sequence ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 Sector-Erase Command Sequence Command Sequence Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XX80H ...
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... SST39WF1601 / SST39WF1602 PRODUCT ORDERING INFORMATION SST 39 WF 1602 - XXXX - XXX Valid Combinations for SST39WF1601 SST39WF1601-70-4C-B3KE SST39WF1601-70-4C-MAQE SST39WF1601-70-4I-B3KE SST39WF1601-70-4I-MAQE Valid Combinations for SST39WF1602 SST39WF1602-70-4C-B3KE SST39WF1602-70-4C-MAQE SST39WF1602-70-4I-B3KE SST39WF1602-70-4I-MAQE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. © ...
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... All linear dimensions are in millimeters. 3. Coplanarity: 0. Ball opening size is 0. 0.05 mm) FIGURE 26: 48-ball Very-Very-Thin-Profile, Fine-pitch Ball Grid Array (WFBGA) 4mm x 6mm SST Package Code MAQ ©2011 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39WF1601 / SST39WF1602 BOTTOM VIEW 4.00 6.00 0.20 0. 1.10 0.10 ...
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... Added YIQE package 04 • Changed 000010H to 000017H to 000008H to 00000FH three places in footnotes of Table 6 on page 9. 05 • EOL of SST39WF1601-70-4C-Y1QE, SST39WF1601-70-4I-Y1QE, SST39WF1602-70-4C-Y1QE, and SST39WF1602-70-4I-Y1QE. Replacement parts SST39WF1601-70-4C-MAQE, SST39WF1601-70-4I-MAQE, SST39WF1602-70-4C-MAQE, and SST39WF1602-70-4I-MAQE in this document. • Added MAQE package drawing and information. • Removed all 90ns speed products 06 • ...