P89V51RD2FA NXP Semiconductors, P89V51RD2FA Datasheet - Page 33

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P89V51RD2FA

Manufacturer Part Number
P89V51RD2FA
Description
MCU 8-Bit 89V 80C51 CISC 64KB Flash 5V 44-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89V51RD2FA

Program Memory Size
64 KB
Package
44PLCC
Device Core
80C51
Family Name
89V
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
SPI/UART
Number Of Timers
3
Ram Size
1 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case Style
LCC
Core Size
8 Bit
Embedded Interface Type
UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
Fig 12. Timer 2 in Capture mode
OSC
T2 pin
6.5.2 Auto-reload mode (up or down counter)
T2EX pin
This bit can be used to generate an interrupt (by enabling the Timer 2 interrupt bit in the
IEN0 register). If EXEN2 = 1, Timer 2 operates as described above, but with the added
feature that a 1-to-0 transition at external input T2EX causes the current value in the
Timer 2 registers, TL2 and TH2, to be captured into registers RCAP2L and RCAP2H,
respectively.
In addition, the transition at T2EX causes bit EXF2 in T2CON to be set, and EXF2 like
TF2 can generate an interrupt (which vectors to the same location as Timer 2 overflow
interrupt). The Timer 2 interrupt service routine can interrogate TF2 and EXF2 to
determine which event caused the interrupt.
There is no reload value for TL2 and TH2 in this mode. Even when a capture event occurs
from T2EX, the counter keeps on counting T2 pin transitions or f
loaded contents of RCAP2L and RCAP2H registers are not protected, once Timer2
interrupt is signalled it has to be serviced before new capture event on T2EX pin occurs.
Otherwise, the next falling edge on T2EX pin will initiate reload of the current value from
TL2 and TH2 to RCAP2L and RCAP2H and consequently corrupt their content related to
previously reported interrupt.
In the 16-bit auto-reload mode, Timer 2 can be configured as either a timer or counter (via
C/T2 in T2CON), then programmed to count up or down. The counting direction is
determined by bit DCEN (Down Counter Enable) which is located in the T2MOD register
(see
counting up. If the DCEN bit is set, Timer 2 can count up or down depending on the value
of the T2EX pin.
Figure 13
6
transition
detector
Table 22
C/T2 = 0
C/T2 = 1
shows Timer 2 counting up automatically (DCEN = 0).
and
EXEN2
Table
control
Rev. 05 — 12 November 2009
TR2
23). When reset is applied, DCEN = 0 and Timer 2 will default to
control
capture
RCAP2L RCAP2H
(8-bits)
TL2
(8-bits)
P89V51RB2/RC2/RD2
TH2
8-bit microcontrollers with 80C51 core
EXF2
TF2
osc
/ 6 pulses. Since once
© NXP B.V. 2009. All rights reserved.
002aaa523
interrupt
timer 2
33 of 80

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