P89V51RD2FA NXP Semiconductors, P89V51RD2FA Datasheet - Page 41
P89V51RD2FA
Manufacturer Part Number
P89V51RD2FA
Description
MCU 8-Bit 89V 80C51 CISC 64KB Flash 5V 44-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet
1.P89V51RD2FA.pdf
(80 pages)
Specifications of P89V51RD2FA
Program Memory Size
64 KB
Package
44PLCC
Device Core
80C51
Family Name
89V
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
SPI/UART
Number Of Timers
3
Ram Size
1 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case Style
LCC
Core Size
8 Bit
Embedded Interface Type
UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89V51RD2FA
Manufacturer:
BI
Quantity:
230
Part Number:
P89V51RD2FA
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
P89V51RD2FA,512
Manufacturer:
Freescale
Quantity:
312
Company:
Part Number:
P89V51RD2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
The following examples will help to show the versatility of this scheme.
Example 1, slave 0:
Example 2, slave 1:
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1. Slave 1 requires
a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would be 1100 0001 since a ‘1’
in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed
with 1100 0000.
SADDR = 1100 0000
--------------------------------------------------- -
SADDR = 1100 0000
--------------------------------------------------- -
SADEN = 1111 1101
SADEN = 1111 1110
Fig 16. Schemes used by the UART to detect ‘given’ and ‘broadcast’ addresses when
Given = 1100 00X0
Given = 1100 000X
multiprocessor communications is enabled
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
saddr(7)
saddr(0)
saddr(7)
saddr(0)
Rev. 05 — 12 November 2009
logic used by UART to detect 'given address' in received data
logic used by UART to detect 'given address' in received data
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
.
.
.
.
.
.
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
given_address_match
broadcast_address_match
002aaa527
© NXP B.V. 2009. All rights reserved.
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