P89V51RD2FA NXP Semiconductors, P89V51RD2FA Datasheet - Page 6
P89V51RD2FA
Manufacturer Part Number
P89V51RD2FA
Description
MCU 8-Bit 89V 80C51 CISC 64KB Flash 5V 44-Pin PLCC Tube
Manufacturer
NXP Semiconductors
Datasheet
1.P89V51RD2FA.pdf
(80 pages)
Specifications of P89V51RD2FA
Program Memory Size
64 KB
Package
44PLCC
Device Core
80C51
Family Name
89V
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
SPI/UART
Number Of Timers
3
Ram Size
1 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Controller Family/series
80C51
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case Style
LCC
Core Size
8 Bit
Embedded Interface Type
UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89V51RD2FA
Manufacturer:
BI
Quantity:
230
Part Number:
P89V51RD2FA
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
P89V51RD2FA,512
Manufacturer:
Freescale
Quantity:
312
Company:
Part Number:
P89V51RD2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
P89V51RB2_RC2_RD2_5
Product data sheet
Symbol
P0.0 to P0.7
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
P1.0 to P1.7
P1.0/T2
P1.1/T2EX
P89V51RB2/RC2/RD2 pin description
Pin
DIP40
39
38
37
36
35
34
33
32
1
2
5.2 Pin description
TQFP44
37
36
35
34
33
32
31
30
40
41
PLCC44
43
42
41
40
39
38
37
36
2
3
Rev. 05 — 12 November 2009
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O with
internal
pull-up
I/O
I/O
I/O
I
Description
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them float, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. Port 0 also receives the code bytes
during the external host mode programming, and outputs
the code bytes during the external host mode verification.
External pull-ups are required during program verification
or as a general purpose I/O port.
P0.0 — Port 0 bit 0.
AD0 — Address/data bit 0.
P0.1 — Port 0 bit 1.
AD1 — Address/data bit 1.
P0.2 — Port 0 bit 2.
AD2 — Address/data bit 2.
P0.3 — Port 0 bit 3.
AD3 — Address/data bit 3.
P0.4 — Port 0 bit 4.
AD4 — Address/data bit 4.
P0.5 — Port 0 bit 5.
AD5 — Address/data bit 5.
P0.6 — Port 0 bit 6.
AD6 — Address/data bit 6.
P0.7 — Port 0 bit 7.
AD7 — Address/data bit 7.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled high by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (I
the internal pull-ups. P1.5, P1.6, P1.7 have high current
drive of 16 mA. Port 1 also receives the low-order address
bytes during the external host mode programming and
verification.
P1.0 — Port 1 bit 0.
T2 — External count input to Timer/counter 2 or Clock-out
from Timer/counter 2.
P1.1 — Port 1 bit 1.
T2EX: Timer/counter 2 capture/reload trigger and direction
control.
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
© NXP B.V. 2009. All rights reserved.
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