MMA8451QR1 Freescale, MMA8451QR1 Datasheet

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MMA8451QR1

Manufacturer Part Number
MMA8451QR1
Description
Manufacturer
Freescale
Datasheet

Specifications of MMA8451QR1

Lead Free Status / RoHS Status
Compliant

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Freescale Semiconductor
Freescale Semiconductor
Technical Data
Technical Data
An Energy Efficient Solution by Freescale
An Energy Efficient Solution by Freescale
3-Axis,
Digital Accelerometer
accelerometer with 14 bits of resolution. This accelerometer is packed with
embedded functions with flexible user programmable options, configurable to two
interrupt pins. Embedded interrupt functions allow for overall power savings
relieving the host processor from continuously polling data. There is access to
both low pass filtered data as well as high pass filtered data, which minimizes the
data analysis required for jolt detection and faster transitions. The device can be
configured to generate inertial wake-up interrupt signals from any combination of
the configurable embedded functions allowing the MMA8451Q to monitor events
and remain in a low power mode during periods of inactivity. The MMA8451Q is
available in a 3 mm x 3 mm x 1 mm QFN package.
Features
Typical Applications
© Freescale Semiconductor, Inc., 2010. All rights reserved.
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
The MMA8451Q is a smart low-power, three-axis, capacitive micromachined
1.95 V to 3.6 V supply voltage
1.6 V to 3.6 V interface voltage
±2g/±4g/±8g dynamically selectable full-scale
Output Data Rates (ODR) from 1.56 Hz to 800 Hz
99 μg/√Hz noise
14-bit and 8-bit digital output
I
2 programmable interrupt pins for 7 interrupt sources
3 embedded channels of motion detection
Orientation (Portrait/Landscape) detection with programmable hysteresis
Automatic ODR change for Auto-WAKE and return to SLEEP
32 sample FIFO
High Pass Filter Data available per sample and through the FIFO
Self-T est
RoHS compliant
Current Consumption: 6 μA – 165 μA
E-Compass applications
Static orientation detection (Portrait/Landscape, Up/Down, Left/Right, Back/
Front position identification)
Notebook, E-Reader and Laptop Tumble and Freefall Detection
Real-time orientation detection (virtual reality and gaming 3D user position
feedback)
Real-time activity analysis (pedometer step counting, freefall drop detection for HDD, dead-reckoning GPS backup)
Motion detection for portable product power saving (Auto-SLEEP and Auto-WAKE for cell phone, PDA, GPS, gaming)
Shock and vibration monitoring (mechatronic compensation, shipping and warranty usage logging)
User interface (menu scrolling by orientation change, tap detection for button replacement)
2
C digital output interface (operates to 2.25 MHz with 4.7 kΩ pull-up)
Freefall or Motion Detection: 1 channel
Pulse Detection: 1 channel
Jolt Detection: 1 channel
MMA8451QR1
Part Number
MMA8451QT
14-bit/8-bit
Temperature Range
-40°C to +85°C
-40°C to +85°C
ORDERING INFORMATION
Package Description
QFN-16
QFN-16
VDDIO
GND
BYP
SCL
NC
MMA8451Q: 3-AXIS DIGITAL
1
2
3
4
5
Top and Bottom View
MMA8451Q
ACCELEROMETER
3 mm x 3 mm x 1 mm
Pin Connections
CASE 2077-01
±2g/±4g/±8g
16
16 PIN QFN
MMA8451Q
6
Top View
Tape and Reel
15
7
Shipping
Tray
Rev 4, 10/2010
14
8
MMA8451Q
13
12
11
10
9
NC
GND
INT1
GND
INT2

Related parts for MMA8451QR1

MMA8451QR1 Summary of contents

Page 1

... User interface (menu scrolling by orientation change, tap detection for button replacement) Part Number MMA8451QT MMA8451QR1 This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2010. All rights reserved. ...

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... Serial I C Interface .................................................................................................................................................... 18 Table 8. Serial Interface Pin Description ................................................................................................................... 18 2 5.11 Operation ................................................................................................................................................. 19 2 Table Address Selection Table ....................................................................................................................... 19 Single Byte Read ......................................................................................................................................................... 19 Multiple Byte Read ....................................................................................................................................................... 19 Single Byte Write ......................................................................................................................................................... 19 Multiple Byte Write ....................................................................................................................................................... 20 2 Table 10 Device Address Sequence ................................................................................................................. 20 2 Figure 12 Timing Diagram ................................................................................................................................. 20 MMA8451Q 2 Sensors Freescale Semiconductor ...

Page 3

... Table 27. PL_BF_ZCOMP Description .....................................................................................................................30 Table 28. Z-Lock Threshold Angles ..........................................................................................................................31 Table 29. Back/Front Orientation Definition ..............................................................................................................31 0x14: P_L_THS_REG Portrait/Landscape Threshold and Hysteresis Register ...........................................................31 0x14: P_L_THS_REG Register (Read/Write) ......................................................................................................31 Table 30. P_L_THS_REG Description ......................................................................................................................31 Table 31. Threshold Angle Thresholds Look-up Table .............................................................................................31 Table 32. Trip Angles with Hysteresis for 45° Angle .................................................................................................31 Sensors Freescale Semiconductor MMA8451Q 3 ...

Page 4

... PULSE_WIND Register (Read/Write) ................................................................................................................. 42 Table 54. PULSE_WIND Description ........................................................................................................................ 42 Table 55. Time Step for PULSE Detection Window @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 1 .... 42 Table 56. Time Step for PULSE Detection Window @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 0 ..... 42 MMA8451Q 4 Sensors Freescale Semiconductor ...

Page 5

... Table 70. OFF_X Description ....................................................................................................................................47 0x30: OFF_Y Offset Correction Y Register ..................................................................................................................47 0x30 OFF_Y Register (Read/Write) ....................................................................................................................47 Table 71. OFF_Y Description ....................................................................................................................................47 0x31: OFF_Z Offset Correction Z Register ..................................................................................................................47 0x31 OFF_Z Register (Read/Write) .....................................................................................................................47 Table 72. OFF_Z Description ....................................................................................................................................47 Table 73. MMA8451Q Register Map .........................................................................................................................48 Table 74. Accelerometer Output Data .......................................................................................................................49 Package Dimensions................................................................................................................................................................50 Sensors Freescale Semiconductor MMA8451Q 5 ...

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... MMA8451Q 6 Sensors Freescale Semiconductor ...

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... Application Notes for Reference The following is a list of Freescale Application Notes written for the MMA8451, 2, 3Q: • AN4068, Embedded Orientation Detection Using the MMA8451 • AN4069, Offset Calibration of the MMA8451 • AN4070, Motion and Freefall Detection Using the MMA8451 • AN4071, High Pass Data and Functions Using the MMA8451, 2,3Q • ...

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... Xout @ 0g Yout @ -1g Zout @ 0g Xout @ -1g Yout @ 0g Zout @ 0g Xout @ 0g Yout @ 1g Zout @ 0g 1.6V - 3.6V Interface Voltage VDDIO VDDIO 4.7kΩ 4.7kΩ SCL SDA Sensors Freescale Semiconductor PU Earth Gravity LR PD Xout @ 1g Yout @ 0g Zout @ 0g Figure 3. Landscape/Portrait Orientation 16 1 VDDIO 2 BYP 0.1μ 0.1μF MMA8451Q ...

Page 9

... The QFN package is compliant with the RoHS standard. Please refer to AN4077. MMA8451Q 8 Description 2 C Serial Clock 2 C Serial Data Least Significant Bit of the Device I C Address Pin Status Input Input Open Open Drain Input Open Drain Input Input Output Input Output Input Input Input Input Input 2 C Sensors Freescale Semiconductor ...

Page 10

... Hz to any other data rate in the Normal, Low Noise + Low Power or High Resolution mode. 3. Before board mount. 4. Post Board Mount Offset Specifications are based Layer PCB, relative to 25°C. 5. Self-Test is one direction only. Sensors Freescale Semiconductor Test Conditions Symbol FS[1:0] set Mode ...

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... Min Typ Max (1) 1.95 2.5 3.6 (1) 1.62 1.8 3 165 165 165 1 75 100 470 1.8 5 0.75*VDDIO 0.3*VDDIO 0.9*VDDIO 0.1*VDDIO 0.1*VDDIO 0.001 1000 — 350 500 2/ODR + 1 ms 2/ODR + 2 ms -40 +85 Freescale Semiconductor Unit V V μA μA μA nF μ µ °C Sensors ...

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... SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t f This allows series protection resistors to be connected in between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified Sensors Freescale Semiconductor Symbol Min f SCL t 1.3 ...

Page 13

... This is an ESD sensitive, improper handling can cause permanent damage to the part. MMA8451Q 12 2 Figure Slave Timing Diagram Symbol g max VDD Vin D drop STG Symbol HBM MM CDM — Value Unit 5,000 g -0 3.6 V -0.3 to VDDIO + 0.3 V 1.8 m -40 to +85 °C -40 to +125 °C Value Unit ±2000 V ±200 V ±500 V ±100 mA Sensors Freescale Semiconductor ...

Page 14

... STANDBY to ACTIVE. These are all noted in the device memory map register table. The SLEEP and WAKE modes are ACTIVE modes. For more information on how to use the SLEEP and WAKE modes and how to transition between these modes please refer to the functionality section of this document. Sensors Freescale Semiconductor SLEEP STANDBY Figure 6. MMA8451Q Mode Transition Diagram ...

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... The resolution is reduced by a factor only the 8-bit results are used. For more information on the data manipulation between data formats and modes, refer to Freescale application note, AN4076. There is a device driver available that can be used with the Sensor T oolbox demo board (LFSTBEB8451, 2, 3Q) with this application note ...

Page 16

... The motion configuration has the option of enabling or disabling a high pass filter to eliminate tilt data (static offset). The freefall does not use the high pass filter. For details on the Freefall and Motion detection with specific application examples and recommended configuration settings, refer to Freescale application note AN4070. 5.6.1 Freefall Detection The detection of “ ...

Page 17

... The status register provides updates on the axes where the event was detected and the direction of the tap. For more information on how to configure the device for tap detection please refer to Freescale application note AN4072. ...

Page 18

... Z-angle lockout region. When lifting the device upright from the flat position it will be active for orientation detection as low as14° from flat. This is user configurable. The default angle is 29° but it can be set as low as 14°. . Figure 10. Illustration of Z-Tilt Angle Lockout Transition Sensors Freescale Semiconductor PORTRAIT 90 0° Landscape Figure 9. Illustration of Portrait to Landscape Transition UPRIGHT ° ...

Page 19

... C bus; the Serial Clock Line (SCL) and the Serial Data line (SDA). The latter (Table 4). INT1 INT2 7 INT CFG 2 C serial interface (Table 8). To enable the interface may be used for 2 C bus. C interface is compliant with Fast mode (400 kHz), Freescale Semiconductor 2 C Sensors ...

Page 20

... MMA8451Q sends an acknowledgement that it has received the data. Since this transmission is complete, the Master transmits a stop condition (SP) to the data transfer. The data sent to the MMA8451Q is now stored in the appropriate register. Sensors Freescale Semiconductor Slave Address (SA0 = 1) 0011101 (0x1D) Figure 12 ...

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... Register Address[7: Register Address[7:0] SR Device Address[6: Data[7:0] Data[7:0] Register Address[7: Register Address[7: NAK: No Acknowledge R: Read = 1 2 Figure 12 Timing Diagram R/W 8-bit Final Value 1 0x39 0 0x38 1 0x3B 0 0x3A Device Address[6: Data[7: Data[7:0] NAK SP Data[7: Data[7:0] Data[7: Write = 0 Freescale Semiconductor NAK Sensors ...

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... Reserved R 0x19 Reserved R 0x1A Reserved R 0x1B Reserved R 0x1C (1)(4) TRANSIENT_CFG R/W 0x1D (1)(2) TRANSIENT_SRC R 0x1E Sensors Freescale Semiconductor Auto-Increment Address FMODE = 0 FMODE > 0 FMODE = 0 FMODE > 0 F_READ = 0 F_READ = 0 F_READ = 1 F_READ = 1 0x01 0x02 0x01 0x03 0x01 0x03 0x00 0x04 0x05 0x00 0x05 ...

Page 23

... RST, ST 0x00 Wake from Sleep, IPOL, PP_OD 0x00 Interrupt enable register 0x00 Interrupt pin (INT1/INT2) map 0x00 X-axis offset adjust 0x00 Y-axis offset adjust 0x00 Z-axis offset adjust — Reserved. Read return 0x00. Bit 1 Bit 0 YDR XDR Sensors Freescale Semiconductor ...

Page 24

... ZDR is set whenever a new acceleration sample related to the Z-axis is generated. ZDR is cleared anytime OUT_Z_MSB register is read. YDR is set whenever a new acceleration sample related to the Y-axis is generated. YDR is cleared anytime OUT_Y_MSB register is read. XDR is set whenever a new acceleration sample related to the X-axis is generated. XDR is cleared anytime OUT_X_MSB register is read. Sensors Freescale Semiconductor MMA8451Q 23 ...

Page 25

... Bit 1 Bit 0 XD8 XD7 XD6 Bit 2 Bit 1 Bit 0 XD0 0 0 Bit 2 Bit 1 Bit 0 YD8 YD7 YD6 Bit 2 Bit 1 Bit 0 YD0 0 0 Bit 2 Bit 1 Bit 0 ZD8 ZD7 ZD6 Bit 2 Bit 1 Bit 0 ZD0 0 0 Bit 2 Bit 1 Bit 0 F_CNT2 F_CNT1 F_CNT0 Sensors Freescale Semiconductor ...

Page 26

... When a byte is read from the FIFO buffer the oldest sample data in the FIFO buffer is returned and also deleted from the front of the FIFO buffer, while the FIFO sample count is decremented by one assumed that the host application shall use the I multi-byte read transaction to empty the FIFO. Sensors Freescale Semiconductor Event Description Bit 4 Bit 3 ...

Page 27

... System Mode. Default value: 00. 00: STANDBY mode SYSMOD[1:0] 01: WAKE mode 10: SLEEP mode MMA8451Q 26 Bit 4 Bit 3 Bit 2 Trig_LNDPRT Trig_PULSE Trig_FF_MT Description Bit 4 Bit 3 Bit 2 FGT_2 FGT_1 FGT_0 for more information on configuring the FIFO Gate function. Bit 1 Bit 0 — — Bit 1 Bit 0 SYSMOD1 SYSMOD0 Sensors Freescale Semiconductor ...

Page 28

... Logic ‘1’ indicates that the data ready interrupt is active indicating the presence of new data and/or data overrun. SRC_DRDY Otherwise logic ‘0’ the interrupt is not active. This bit is asserted when the ZYXOW and/or ZYXDR is set and the interrupt has been enabled. This bit is cleared by reading the X, Y, and Z data. Sensors Freescale Semiconductor Bit 4 Bit 3 Bit 2 SRC_LNDPRT SRC_PULSE ...

Page 29

... This register sets the high-pass filter cut-off frequency for removal of the offset and slower changing acceleration data. The output of this filter is indicated by the data registers (0x01-0x06) when bit 4 (HPF_OUT) of Register 0x0E is set. The filter cut-off options change based on the data rate selected as shown in to Freescale application note AN4071. 0x0F HP_FILTER_CUTOFF: High Pass Filter Register (Read/Write) Bit 7 ...

Page 30

... Hz 6.3 Portrait/Landscape Embedded Function Registers For more details on the meaning of the different user configurable settings and for example code refer to Freescale application note AN4068. 0x10: PL_STATUS Portrait/Landscape Status Register This status register can be read to get updated information on any change in orientation by reading Bit the specifics of the orientation by reading the other bits ...

Page 31

... Step size is 5°. ≥ 43°. Bit 2 Bit 1 Bit 0 — — — Bit 2 Bit 1 Bit 0 DBNCE[1] DBNCE[0] Time Step (ms) LPLN HighRes LP 1.25 1.25 1.25 2.5 2.5 2 2.5 160 80 2.5 160 Bit 2 Bit 1 Bit 0 ZLOCK[2] ZLOCK[1] ZLOCK[0] Sensors Freescale Semiconductor ...

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... Note: THS + HYS > 0 and THS + HYS < 32 for the Landscape/Portrait detection to work correctly. All angles are accurate to ±2° Table 31. Threshold Angle Thresholds Look-up Table Threshold Angle (approx.) Table 32. Trip Angles with Hysteresis for 45° Angle Hysteresis Register Value Sensors Freescale Semiconductor Z-Lock Value Threshold Angle 0x00 14° 0x01 18° 0x02 21° 0x03 25° 0x04 29° 0x05 33° ...

Page 33

... EA is zero, the event flags ZHE, ZHP, YHE, YHP, XHE, and XHP reflect the motion detection status (i.e., high g event) without any debouncing, provided that the corresponding bits ZEFE, YEFE, and/or XEFE are set. When the EA bit is set, these bits keep their current value until the FF_MT_SRC register is read. MMA8451Q 32 Sensors Freescale Semiconductor ...

Page 34

... High g Region 0x16 FF_MT_SRC Freefall/Motion Source Register 0x16: FF_MT_SRC Freefall and Motion Source Register (Read Only) Bit 7 Bit 6 Bit 5 EA — ZHE Sensors Freescale Semiconductor Bit 4 Bit 3 YEFE XEFE +8g High g + Threshold (Motion) Low g Threshold (Freefall) High g - Threshold (Motion) -8g Figure 13. FF_MT_CFG High and Low g Level ...

Page 35

... Decrementing the debounce counter acts as a median enabling the system to filter out irregular spurious events which might impede the detection of inertial events. MMA8451Q 34 Bit 4 Bit 3 THS4 THS3 (Figure 14, (c)) until the debounce counter reaches 0 or the inertial event of interest Bit 2 Bit 1 Bit 0 THS2 THS1 THS0 Sensors Freescale Semiconductor ...

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... Sensors Freescale Semiconductor Bit 4 Bit Table 37. HighRes LP Normal 0.319 0.319 1.25 0.638 0.638 2.5 0.638 1.28 5 0.638 2.55 10 0.638 5 ...

Page 37

... Detect) Count Threshold FF Counter Value FFEA High g Event on all 3-axis (Motion Detect) Count Threshold Debounce Counter Value EA High g Event on all 3-axis (Motion Detect) Count Threshold Debounce Counter Value EA MMA8451Q 36 Figure 14. DBCNTM Bit Function (a) DBCNTM = 1 (b) DBCNTM = 0 (c) Sensors Freescale Semiconductor ...

Page 38

... Polarity of X Transient Event that triggered interrupt. Default value: 0. X_Trans_Pol 0: X event was Positive event was Negative g When the EA bit gets set while ELE = 1, all other status bits get frozen at their current state. By reading the TRANSIENT_SRC register, all bits get cleared. Sensors Freescale Semiconductor Bit 4 Bit 3 — ELE ZTEFE ...

Page 39

... Bit 2 Bit 1 Bit 0 THS2 THS1 THS0 Bit 2 Bit 1 Bit Time Step (ms) LPLN HighRes LP 1.25 1.25 1.25 2.5 2.5 2 2.5 160 80 2.5 160 Sensors Freescale Semiconductor ...

Page 40

... Single, Double and Directional Tap Detection Registers For more details of how to configure the tap detection and sample code please refer to Freescale application note, AN4072. The tap detection registers are referred to as “Pulse”. 0x21: PULSE_CFG Pulse Configuration Register This register configures the event flag for the tap detection for enabling/disabling the detection of a single and double pulse on each of the axes ...

Page 41

... Bit 1 Bit 0 THSX1 THSX0 Bit 1 Bit 0 THSY1 THSY0 Bit 1 Bit 0 THSZ1 THSZ0 Bit 1 Bit 0 TMLT1 TMLT0 Time Step (ms) HighRes LP 1.25 1.25 1.25 2.5 2.5 2 2.5 160 80 2.5 160 Sensors Freescale Semiconductor ...

Page 42

... Sensors Freescale Semiconductor HighRes LP Normal LPLN 0.159 0.159 0.625 0.625 0.159 0.319 0.625 0.625 0.159 0.638 1.25 0.159 1.28 2.5 0.159 2. ...

Page 43

... Bit 2 Bit 1 Bit 0 WIND1 WIND0 Time Step (ms) LPLN HighRes LP 2.5 2.5 2 160 5 160 160 5 320 160 5 320 Time Step (ms) LPLN HighRes LP 1.25 1.25 1.25 1.25 1.25 2.5 2 1.25 80 Sensors Freescale Semiconductor ...

Page 44

... ODR. See Register 0x2C for the WAKE from SLEEP bits. If the Auto-SLEEP bit is disabled, then the device can only toggle between STANDBY and WAKE mode. If Auto-SLEEP interrupt is enabled, transitioning from ACTIVE mode to Auto-SLEEP mode and vice versa generates an interrupt. Sensors Freescale Semiconductor Bit 4 Bit 3 D5 ...

Page 45

... ASLP_RATE0 Frequency (Hz DR1 DR0 Table 63. Full Scale Selection Active Mode 0 STANDBY 1 ACTIVE Bit 2 Bit 1 LNOISE F_READ ACTIVE 50 12.5 6.25 1.56 ODR Period 800 Hz 1.25 ms 400 Hz 2.5 ms 200 100 12 6.25 Hz 160 ms 1.56 Hz 640 ms Freescale Semiconductor Bit 0 Sensors ...

Page 46

... OS Ratio 1. 128 6. 12 100 200 400 Hz 165 4 800 Hz 165 2 Sensors Freescale Semiconductor Bit 4 Bit 3 0 SMODS1 SMODS0 (S)MODS0 Power Mode Low Noise Low Power 1 0 High Resolution 1 1 Low Power Low Noise Low Power (01) High Resolution (10) μ Current A OS Ratio Current ...

Page 47

... The corresponding functional block interrupt enable bit allows the functional block to route its event detection flags to the system’s interrupt controller. The interrupt controller routes the enabled functional block interrupt to the INT1 or INT2 pin. MMA8451Q 46 Bit 5 Bit 4 Bit 3 WAKE_PULSE WAKE_FF_MT Bit 4 Bit 3 Description Bit 2 Bit 1 Bit 0 — IPOL PP_OD Bit 2 Bit 1 Bit 0 — INT_EN_DRDY Sensors Freescale Semiconductor ...

Page 48

... OFF_Z Offset Correction Z Register 0x31 OFF_Z Register (Read/Write) Bit 7 Bit 6 Bit Table 72. OFF_Z Description D[7:0] Z-axis offset value. Default value: 0000_0000. Sensors Freescale Semiconductor Bit 4 Bit 3 Description Figure 11 uses the corresponding bit field in the CTRL_REG5 register to determine Bit 4 Bit Bit 4 ...

Page 49

... WIND3 WIND2 WIND1 WIND0 DR0 LNOISE F_READ ACTIVE SMODS0 SLPE MODS1 MODS0 WAKE_FF_MT — IPOL PP_OD INT_EN_PULSE INT_EN_FF_MT — INT_EN_DRDY INT_CFG_PULSE INT_CFG_FF_MT — INT_CFG_DRDY Sensors Freescale Semiconductor Bit 0 XDR XD6 0 YD6 0 ZD6 0 — 0 FS0 SEL0 — — XHP THS0 D0 THS0 D0 Pol_X ...

Page 50

... Data 0111 1111 0111 1110 … 0000 0001 0000 0000 1111 1111 … 1000 0001 1000 0000 Sensors Freescale Semiconductor Range ±2g (0.25 mg) Range ±4g (0.5 mg) 1.99975g +3.9995g 1.99950g +3.9990g … … 0.00025g +0.0005g 0.00000g 0.00000g -0 ...

Page 51

... MMA8451Q 50 PACKAGE DIMENSIONS CASE 2077-01 ISSUE O 16-LEAD QFN Sensors Freescale Semiconductor ...

Page 52

... Sensors Freescale Semiconductor PACKAGE DIMENSIONS CASE 2077-01 ISSUE O 16-LEAD Q MMA8451Q 51 ...

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... MMA8451Q 52 PACKAGE DIMENSIONS CASE 2077-01 ISSUE O 16-LEAD Q Sensors Freescale Semiconductor ...

Page 54

... Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...

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