MT47H256M8HG-37E:A Micron Technology Inc, MT47H256M8HG-37E:A Datasheet - Page 116
MT47H256M8HG-37E:A
Manufacturer Part Number
MT47H256M8HG-37E:A
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H256M8HG-37EA.pdf
(134 pages)
Specifications of MT47H256M8HG-37E:A
Organization
256Mx8
Address Bus
18b
Access Time (max)
500ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
150mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H256M8HG-37E:A
Manufacturer:
Micron
Quantity:
110
Company:
Part Number:
MT47H256M8HG-37E:A
Manufacturer:
MICRON
Quantity:
528
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SELF REFRESH
PDF: 09005aef824f87b6
2gbddr2.pdf – Rev. F 12/10 EN
The SELF REFRESH command is initiated when CKE is LOW. The differential clock
should remain stable and meet
refresh mode. The procedure for exiting self refresh requires a sequence of commands.
First, the differential clock must be stable and meet
prior to CKE going back to HIGH. Once CKE is HIGH (
with three clock registrations), the DDR2 SDRAM must have NOP or DESELECT com-
mands issued for
ments is used to apply NOP or DESELECT commands for 200 clock cycles before
applying any other command.
t
XSNR. A simple algorithm for meeting both refresh and DLL require-
116
t
CKE specifications at least 1 ×
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x4, x8, x16 DDR2 SDRAM
t
CK specifications at least 1 ×
t
CKE [MIN] has been satisfied
© 2006 Micron Technology, Inc. All rights reserved.
t
CK after entering self
SELF REFRESH
t
CK
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