MT16VDDT6464AG-40BGB Micron Technology Inc, MT16VDDT6464AG-40BGB Datasheet
MT16VDDT6464AG-40BGB
Specifications of MT16VDDT6464AG-40BGB
Related parts for MT16VDDT6464AG-40BGB
MT16VDDT6464AG-40BGB Summary of contents
Page 1
... DDR SDRAM UNBUFFERED DIMM Features • 184-pin, dual in-line memory module (DIMM) • Fast data transfer rates: PC2100 or PC2700 • Utilizes 266 MT/s and 333 MT/s DDR SDRAM components • 256MB (32 Meg x 64), 512MB (64 Meg x 64), 1GB (128 Meg x 64), and 2GB (256 Meg x 64) • ...
Page 2
... MT16VDDT25664AG-26A__ MT16VDDT25664AY-26A__ MT16VDDT25664AG-265__ MT16VDDT25664AY-265__ NOTE: All part numbers end with a two-place code (not shown), designating component and PCB revisions. Consult factory for current revision codes. Example: MT16VDDT6464AG-265A1. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) CONFIGURATION BANDWIDTH ...
Page 3
Table 3: Pin Assignment (184-Pin DIMM Front PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL DQ17 47 REF 2 DQ0 25 DQS2 DQ1 DQS0 ...
Page 4
Table 5: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 3 for more information PIN NUMBERS 63, 65, 154 WE#, CAS#, RAS# 16, 17, 75, 76, 137, 138 CK0, CK0#, CK1, CK1#, ...
Page 5
... V Supply Serial EEPROM positive power supply: +2.3V to +3.6V. DDSPD DNU — Do Not Use: These pins are not connected on these modules, but are assigned pins on other modules in this product family. NC — No Connect: These pins should be left unconnected. 5 184-PIN DDR SDRAM UDIMM DESCRIPTION Micron Technology, Inc., reserves the right to change products or specifications without notice. © ...
Page 6
... DD V REF V SS NOTE: 1. All resistor values are 22 unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part number guide at www.micron.com/numberguide. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) DQS4 ...
Page 7
... CAS# CKE0 CKE1 WE# NOTE: 1. All resistor values are 22 unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part number guide at www.micron.com/numberguide. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) ...
Page 8
... The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be pro- grammed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...
Page 9
... BA1 BA0 A10 A11 Operating Mode CAS Latency BT * M13 and M12 (BA0 and BA1) must be “0, 0” to select the base mode register (vs. the extended mode register). 512MB and 1GB Modules BA1 BA0 A12 A11 A10 Operating Mode CAS Latency BT * M14 and M13 (BA0 and BA1) must be “0, 0” to select the base mode register (vs ...
Page 10
Table 6: Burst Definition Table ORDER OF ACCESSES WITHIN STARTING BURST COLUMN TYPE = LENGTH ADDRESS SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1 ...
Page 11
... DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) 184-PIN DDR SDRAM UDIMM Figure 7: Extended Mode Register Definition Diagram 256MB Module BA1 BA0 A8 A11 A10 Operating Mode 512MB and 1GB Modules BA1 BA0 A10 A8 A12 A11 Operating Mode The 2GB Module BA1 BA0 ...
Page 12
Commands Table 8, Commands Truth Table, and Table 9, DM Operation Truth Table, provide a general reference of available commands. For a more detailed description Table 8: Commands Truth Table CKE is HIGH for all commands shown except SELF REFRESH; ...
Page 13
Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...
Page 14
... (MIN); control inputs change only during Active READ, or WRITE commands NOTE: a: Value calculated as one module rank in this operating condition, and all other module ranks Value calculated reflects all module ranks in this operating condition. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) ...
Page 15
... Address and control inputs change only during Active READ, or WRITE commands NOTE: a: Value calculated as one module rank in this operating condition, and all other module ranks Value calculated reflects all module ranks in this operating condition. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN ...
Page 16
... RC (MIN); control inputs change only during Active READ, or WRITE commands NOTE: a: Value calculated as one module rank in this operating condition, and all other module ranks Value calculated reflects all module ranks in this operating condition. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) ...
Page 17
... RC (MIN); control inputs change only during Active READ, or WRITE commands NOTE: a: Value calculated as one module rank in this operating condition, and all other module ranks Value calculated reflects all module ranks in this operating condition. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) ...
Page 18
Table 16: Capacitance Note: 11; notes appear on pages 20–23 PARAMETER Input/Output Capacitance: DQ, DQS, DM Input Capacitance: Command and Address Input Capacitance: S#, CKE Input Capacitance: CK0, CK0# Input Capacitance: CK1, CK1#; CK2, CK2# Table 17: DDR SDRAM Component ...
Page 19
Table 17: DDR SDRAM Component Electrical Characteristics and Recommended AC Operating Conditions (Continued) Notes: 1–5, 13-15, 29, 48, 49; notes appear on pages 20–23; 0°C AC CHARACTERISTICS PARAMETER Address and control input setup time (slow slew rate) Address and Control ...
Page 20
Notes 1. All voltages referenced Tests for AC timing and electrical AC and DC DD characteristics may be conducted at nominal ref- erence/supply voltage levels, but the related spec- ifications and device operation are ...
Page 21
DRAM control- ler greater than eight refresh cycles is not allowed. 22. The valid data window is derived by achieving t t other specifications CK/2), ...
Page 22
READs and WRITEs with auto precharge are not t allowed to be issued until RAS (MIN) can be satis- fied prior to the internal precharge command being issued. 32. Any positive glitch in the nominal voltage must be less ...
Page 23
... DLL is required to be reset. This is followed by 200 clock cycles. 47. Leakage number reflects the worst case leakage possible through the module pin, not what each memory device contributes. 48. When an input signal is HIGH or LOW defined as a steady state logic HIGH or logic LOW. ...
Page 24
Initialization To ensure device operation the DRAM must be ini- tialized as described below: 1. Simultaneously apply power Apply V and then V power. REF TT 3. Assert and hold CKE at a LVCMOS logic low. 4. ...
Page 25
... NOTE: 1. Micron Technology, Inc. recommends a minimum air flow of 1 meter/second (~197 LFM) across the module. 2. The component case temperature measurements shown above were obtained experimentally. The typical system to be used for experimental purposes is a dual-processor 600 MHz work station, fully loaded, with four comparable registered memory modules ...
Page 26
SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 13, Data Validity, and Figure ...
Page 27
Table 18: EEPROM Device Select Code The most significant bit (b7) is sent first SELECT CODE Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE Current Address Read Random Address Read Sequential Read ...
Page 28
Table 20: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...
Page 29
... Fundamental Memory Type 3 Number of Row Addresses on Assembly 4 Number of Column Addresses on Assembly 5 Number of Physical Ranks on DIMM 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels 9 t SDRAM Cycle Time, CK, (CAS Latency = 2.5) (See note 1) 10 SDRAM Access From Clock, (CAS Latency = 2.5) 11 ...
Page 30
... SPD Revision 63 Checksum For Bytes 0-62 64 Manufacturer’s JEDEC ID Code 65-71 Manufacturer’s JEDEC ID Code 72 Manufacturing Location 73-90 Module Part Number (ASCII) 91 PCB Identification Code 92 Identification Code (Continued) 93 Year of Manufacture in BCD pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) ...
Page 31
... The value of RP, RCD and RAP for -335 modules indicated as 18ns to align with industry specifications; actual DDR SDRAM device specification is 15ns. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) 184-PIN DDR SDRAM UDIMM ENTRY (VERSION) ...
Page 32
... Fundamental Memory Type 3 Number of Row Addresses on Assembly 4 Number of Column Addresses on Assembly 5 Number of Physical Ranks on DIMM 6 Module Data Width 7 Module Data Width (Continued) 8 Module Voltage Interface Levels 9 t SDRAM Cycle Time, CK, (CAS Latency = 2.5) (See note 1) 10 SDRAM Access From Clock, 11 Module Configuration Type ...
Page 33
... The value of RP, RCD and RAP for -335 modules indicated as 18ns to align with industry specifications; actual DDR SDRAM device specification is 15ns. pdf: 09005aef80739fa5, source: 09005aef807397e5 DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN 256MB, 512MB, 1GB, 2GB (x64, DR) 184-PIN DDR SDRAM UDIMM ENTRY (VERSION) ...
Page 34
Figure 17: 184-PIN DDR DIMM Dimensions – Standard PCB 0.079 (2.00) R (4X 0.098 (2.50) D (2X) 0.091 (2.30) TYP. PIN 1 0.091 (2.30) 0.050 (1.27) TYP. TYP. U19 U10 U11 PIN 184 1.95 (49.53) NOTE: All dimensions ...
Page 35
Figure 18: 184-PIN DDR DIMM Dimensions – Low-Profile PCB .00) R (4X .50) D (2X) 0) TYP. PIN 1 0.091 (2.30) 0.050 (1.27) TYP. TYP. U19 U18 PIN 184 NOTE: All dimensions arein inches (millimeters); Data Sheet Designation ...