HCPL-788J Avago Technologies US Inc., HCPL-788J Datasheet - Page 9

• Manufacturer Part Number: HCPL-788J
• Description: OPTOCOUPLR AMP CURR SENSE 16SOIC
• Manufacturer: Avago Technologies US Inc.
• Series: -r
• Type: Current Sensorr

Specifications of HCPL-788J

• Package Type: SOIC
• Operating Supply Voltage (typ): 5V
• Voltage - Isolation: 3750Vrms
• Input Type: DC
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.295", 7.50mm Width)
• No. Of Amplifiers: 1
• Input Offset Voltage: 3mV
• Bandwidth: 30kHz
• Isolation Voltage: 3.75kV
• Supply Voltage Range: ± 4.5V To ± 5.5V
• Supply Current: 20mA
• Amplifier Case Style: SOIC
• No. Of Pins: 16
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Not Compliant

Notes:
1. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 600 Vrms for 1 second. This test is
2. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
3. Device considered a two terminal device: pins 1-8 shorted together and pins 9-16 shorted together.
4. V
5. If V
6. Input Offset voltage is defined as the DC Input voltage required to obtain an output voltage (at pin 12) of V
7. This is the Absolute Value of Input Offset Change vs. Temperature.
8. This is the Absolute Value of V
9. |V
10. ABSVAL is derived from V
11. CMRR
12. The signal-to-noise ratio of the HCPL-788J can be improved with the addition of an external low pass filter to the output. See Frequently Asked
13. As measured from 50% of V
14. This is the amount of time from when the FAULT Detection Threshold (230 mV ≤ V
15. This is the amount of time for the FAULT Output to return to a high state once the FAULT Detection Threshold (230 mV ≤ V
16. Input pulses shorter than the fault rejection pulse width (t
17. CMTI is also known as Common Mode Rejection or Isolation Mode Rejection. It is tested by applying an exponentially rising falling voltage
18. CMRR is defined as the ratio of differential signal gain (signal applied differentially between pins 1 and 2) to the common mode gain (input pins
9
performed before the 100% production test for partial discharge (method b) shown in IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table,
if applicable.
insulation characteristics table.
V
V
both pins 1 and 2 with respect to pin 8.
Question #4.2 in the Applications Information Section at the end of this data sheet.
low.
longer exceeded.
in the Applications Information Section at the end of this data sheet for additional detail on how to avoid false tripping of the FAULT output due
to cable capacitance charging transients.
step on pin 8 (GND1) with respect to pin 9 (GND2). The rise time of the test waveform is set to approximately 50 ns. The amplitude of the step
is adjusted until V
continue to function if more than 10 kV/μs common mode slopes are applied, as long as the break-down voltage limitations are observed. [The
HCPL-788J still functions with common mode slopes above 10 kV/μs, but output noise may increase to as much as 600 mV peak to peak.]
tied to pin 8 and the signal applied between the input and the output of the isolation amplifier) at 60 Hz, expressed in dB.
continuous voltage rating. For the continuous voltage rating refer to your equipment level safety specification or IEC/EN/DIN EN 60747-5-2
DD1
IN
OUT
IN+
REF
approaches +256 mV or -256 mV. H
. H
| must exceed this amount in order for the FAULT output to be activated.
must be applied to both pins 5 and 7. V
exceeds V
ABS
IN
|ABSVAL - 2 x | V
is defined as the ratio of the gain for differential inputs applied between pins 1 and 2 to the gain for common mode inputs applied to
is expressed in terms of percent of full scale and is defined as:
DD2
V
OUT
(due to power-up sequence, for example), the current into pin 11 (I
REF
(pin 12) exhibits more than 100 mV deviation from the average output voltage for more than 1μs. The HCPL-788J will
OUT
OUT
- V
IN
(which has the gain and offset tolerances stated earlier). ABSVAL is 0 V when V
REF
to 50% of V
OUT
/ 2| |
Gain Change vs. Temperature.
x 100.
ABS
OUT
is the difference between the actual ABSVAL output and what ABSVAL should be, given the value of
.
DD2
must be applied to both pins 10 and 15.
REJECT
), will not activate the FAULT (pin 14) output. See Frequently Asked Question #2.3
THF
REF
≤ 280 mV) is exceeded to when the FAULT output goes
) should be limited to 20 mA or less.
IN
REF
= 0 V and increases toward V
/2.
THF
≤ 280 mV) is no
REF
as