NHE6300ESB S L7XJ Intel, NHE6300ESB S L7XJ Datasheet - Page 423
NHE6300ESB S L7XJ
Manufacturer Part Number
NHE6300ESB S L7XJ
Description
Manufacturer
Intel
Datasheet
1.NHE6300ESB_S_L7XJ.pdf
(848 pages)
Specifications of NHE6300ESB S L7XJ
Lead Free Status / RoHS Status
Compliant
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8—Intel
8.9.9
Table 309. TCO2_CNT—TCO2 Control Register
8.9.10
Table 310. TCO_MESSAGE1 and TCO_MESSAGE2 Registers
November 2007
Order Number: 300641-004US
15:4
Bits
Bits
Default Value:
Default Value:
2:1
7:0
I/O Address:
I/O Address:
3
0
Lockable:
®
Device:
Device:
GPIO11_ALERT_DISABL
6300ESB ICH
TCO_MESSAGE[n]
INTRD_SE
TCO2_CNT—TCO2 Control Register
TCO_MESSAGE1 and TCO_MESSAGE2 Registers
Reserved
Reserved
31
TCOBASE +0Ah
0008h
No
Name
31
TCOBASE+0Ch(Message
1)
TCOBASE+0Dh(Message
2)
00h
Name
E
Reserved.
Disable GPIO11/SMBALERT# as an alert source for the
heartbeats and the SMBus slave. At reset (via RSMRST#
asserted) this bit is set and GPIO[11] alerts are disabled
Selects the action to take when the INTRUDER# signal goes
active.
00 = No interrupt or SMI#
01 = Interrupt (as selected by TCO_INT_SEL).
10 = SMI
11 = Reserved
Reserved.
The value written to this register can be passed via SMBus to
an External LAN controller. It may be used by the BIOS or
system management software to indicate more details on the
boot progress. This register will be reset to the default of 00h
based on RSMRST# (but not PCI reset).
Power Well:
Description
Description
Attribute:
Attribute:
Function:
Function:
Size:
Size:
0
Read/Write
16-bit
Resume
0
Read/Write
8-bit
Intel
®
6300ESB I/O Controller Hub
Access
Access
R/W
R/W
R/W
423
DS
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