ISP1760ET,557 NXP Semiconductors, ISP1760ET,557 Datasheet - Page 44

• Manufacturer Part Number: ISP1760ET,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1760ET,557

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 40.
[1]
ISP1760_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
The reserved bits should always be written with the reset value.
DMA Configuration register (address 0330h) bit allocation
8.3.5 DMA Configuration register
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Table 39.
The bit allocation of the DMA Configuration register is given in
Bit
31 to 2
1
0
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
reserved
Symbol
-
RESET_HC Reset Host Controller: Reset only the host controller-specific registers
RESET_ALL Reset All: Reset all the host controller and CPU interface registers.
SW Reset - Software Reset register (address 030Ch) bit description
[1]
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 04 — 4 February 2008
Description
reserved; write logic 0
(only registers with address below 300h).
0 — No reset
1 — Enable reset
0 — No reset
1 — Enable reset
DMA_COUNTER[23:16]
DMA_COUNTER[15:8]
DMA_COUNTER[7:0]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
R/W
R/W
R/W
R/W
BURST_LEN[1:0]
27
19
11
0
0
0
3
0
Embedded Hi-Speed USB host controller
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
Table
ENABLE_
DMA
R/W
R/W
R/W
R/W
40.
17
25
1
0
0
9
0
0
© NXP B.V. 2008. All rights reserved.
ISP1760
DMA_READ
_WRITE_
R/W
R/W
R/W
R/W
SEL
16
24
43 of 110
0
0
0
0
8
0