NH82801FBM S L89K Intel, NH82801FBM S L89K Datasheet - Page 321
NH82801FBM S L89K
Manufacturer Part Number
NH82801FBM S L89K
Description
Manufacturer
Intel
Datasheet
1.NH82801FBM_S_L89K.pdf
(786 pages)
Specifications of NH82801FBM S L89K
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8.3.22
8.3.23
8.3.24
Intel
®
I/O Controller Hub 6 (ICH6) Family Datasheet
PMSK2—Polling Mask 2 Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register provides software an interface for the Polling #2 Data Mask.
PMSK3—Polling Mask 3 Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register provides software an interface for the Polling #3 Data Mask.
PMSK4—Polling Mask 4 Register
(ASF Controller—B1:D8:F0)
Offset Address:
Default Value:
This register provides software an interface for the Polling #4 Data Mask.
Bit
7:0
Bit
7:0
Bit
7:0
Polling Mask for Polling Descriptor #3 (POL3_MSK) — R/W. This register is used to read and
write the data mask for Polling Descriptor #3. Software should only access this register when the
ASF controller is GLOBAL DISABLED.
Polling Mask for Polling Descriptor #4 (POL4_MSK) — R/W. This register is used to read and
write the data mask for Polling Descriptor #4. Software should only access this register when the
ASF controller is GLOBAL DISABLED.
Polling Mask for Polling Descriptor #2 (POL2_MSK) — R/W. This field is used to read and write
the data mask for Polling Descriptor #2. Software should only access this register when the ASF
controller is GLOBAL DISABLED.
F9h
XXh
FAh
XXh
FBh
XXh
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/W
8 bits
R/W
8 bits
R/W
8 bits
321
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