FW82801EB Intel, FW82801EB Datasheet - Page 187

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

5.17.4.2
5.17.4.2.1
Intel
®
Figure 19. SATA Power States
82801EB ICH5 / 82801ER ICH5R Datasheet
Each of these device states are subsets of the host controller’s D0 state.
Finally, SATA defines three PHY layer power states, which have no equivalent mappings to
parallel ATA. They are:
Since these states have much lower exit latency than the ACPI D1 and D3 states, the SATA
controller defines these states as sub-states of the device D0 state.
Power State Transitions
Partial and Slumber State Entry/Exit
The partial and slumber states save interface power when the interface is idle. The SATA controller
defines PHY layer power management (as performed via primitives) as a driver operation from the
host side, and a device proprietary mechanism on the device side. The SATA controller accepts
device transition types, but does not issue any transitions as a host. All received requests from a
SATA device will be ACKed.
When an operation is performed to the SATA controller such that it needs to use the SATA cable,
the controller must check whether the link is in the Partial or Slumber states, and if so, must issue a
COM_WAKE to bring the link back online. Similarly, the SATA device must perform the same
action.
•
•
•
•
•
D1 – device enters when it receives a STANDBY IMMEDIATE command. Exit latency from
this state is in seconds
D3 – from the SATA device’s perspective, no different than a D1 state, in that it is entered via
the STANDBY IMMEDIATE command. However, an ACPI method is also called which will
reset the device and then cut its power.
PHY READY – PHY logic and PLL are both on and active
Partial – PHY logic is powered, but in a reduced state. Exit latency is no longer than 10 ns
Slumber – PHY logic is powered, but in a reduced state. Exit latency can be up to 10 ms.
Ready
PHY =
PHY =
Partial
Device = D0
Slumber
PHY =
Resume Latency
disabled)
Off (port
PHY =
Host = D0
Power
Slumber
PHY =
Device = D1
disabled)
Off (port
PHY =
Slumber
PHY =
Functional Description
Device = D3
disabled)
Off (port
PHY =
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