FW82801EB Intel, FW82801EB Datasheet - Page 196

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
196
Table 84. TD Token
Table 85. TD Buffer Pointer
31:21
18:15
31:0
14:8
Bit
7:0
Bit
20
19
Buffer Pointer (BUFF_PNT). Bits [31:0] corresponds to memory address [31:0], respectively. It
points to the beginning of the buffer that will be used during this transaction. This buffer must be at
least as long as the value in the Maximum Length field described int the TD token. The data buffer
may be byte-aligned.
Maximum Length (MAXLEN). The Maximum Length field specifies the maximum number of data
bytes allowed for the transfer. The Maximum Length value does not include protocol bytes, such as
Packet ID (PID) and CRC. The maximum data packet is 1280 bytes. The 1280 packet length is the
longest packet theoretically guaranteed to fit into a frame. Actual packet maximum lengths are set by
HCD according to the type and speed of the transfer. Note that the maximum length allowed by the
Universal Serial Bus Revision 2.0 Specification is 1023 bytes. The valid encodings for this field are:
0x000 = 1 byte
0x001 = 2 bytes
....
0x3FE = 1023 bytes
0x3FF = 1024 bytes
....
0x4FF = 1280 bytes
0x7FF = 0 bytes (null data packet)
Note that values from 500h to 7FEh are illegal and cause a consistency check failure.
In the transmit case, the Intel
fetches from host memory. In most cases, this is the number of bytes it will actually transmit. In rare
cases, the ICH5 may be unable to access memory (e.g., due to excessive latency) in time to avoid
underrunning the transmitter. In this instance the ICH5 would transmit fewer bytes than specified in
the Maximum Length field.
Reserved.
Data Toggle (D). This bit is used to synchronize data transfers between a USB endpoint and the
host. This bit determines which data PID is sent or expected (0=DATA0 and 1=DATA1). The Data
Toggle bit provides a 1-bit sequence number to check whether the previous packet completed. This
bit must always be 0 for Isochronous TDs.
Endpoint (ENDPT). This 4-bit field extends the addressing internal to a particular device by
providing 16 endpoints. This permits more flexible addressing of devices in which more than one
sub-channel is required.
Device Address. This field identifies the specific device serving as the data source or sink.
Packet Identification (PID). This field contains the Packet ID to be used for this transaction. Only
the IN (69h), OUT (E1h), and SETUP (2Dh) tokens are allowed. Any other value in this field causes
a consistency check failure resulting in an immediate halt of the ICH5. Bits [3:0] are complements of
bits [7:4].
®
ICH5 uses this value as a terminal count for the number of bytes it
Description
Description
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet