FW82801EB Intel, FW82801EB Datasheet - Page 289

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

7.2.2
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
SCB_CMD—System Control Block Command Word
Register (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
The processor places commands for the Command and Receive units in this register. Interrupts are
also acknowledged in this register.
Bit
5:2
1:0
Bit
15
14
13
12
11
10
9
8
Receive Unit Status (RUS) — RO.
0000 = Idle
0001 = Suspended
0010 = No Resources
0011 = Reserved
0100 = Ready
0101 = Reserved
0110 = Reserved
0111 = Reserved
Reserved
CX Mask (CX_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of a CX interrupt.
FR Mask (FR_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of an FR interrupt.
CNA Mask (CNA_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of a CNA interrupt.
RNR Mask (RNR_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of an RNR interrupt.
ER Mask (ER_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of an ER interrupt.
FCP Mask (FCP_MSK) — R/W.
0 = Interrupt not masked.
1 = Disable the generation of an FCP interrupt.
Software Generated Interrupt (SI) — WO.
0 = No Effect.
1 = Setting this bit causes the LAN controller to generate an interrupt.
Interrupt Mask (IM) — R/W. This bit enables or disables the LAN controller’s assertion of the INTA#
signal. This bit has higher precedence that the Specific Interrupt Mask bits and the SI bit.
0 = Enable the assertion of INTA#.
1 = Disable the assertion of INTA#.
02
0000h
–
03h
1000 = Reserved
1001 = Suspended with no more RBDs
1010 = No resources due to no more RBDs
1011 = Reserved
1100 = Ready with no RBDs present
1101 = Reserved
1110 = Reserved
1111 = Reserved
Description
Description
Attribute:
Size:
LAN Controller Registers (B1:D8:F0)
R/W, WO
16 bits
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