FW82801EB Intel, FW82801EB Datasheet - Page 309

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

8.1.17
8.1.18
8.1.19
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
MEMBASE—Memory Base Register
(HUB-PCI—D30:F0)
Offset Address:
Default Value:
This register defines the base of the hub interface to PCI non-prefetchable memory range. Since the
ICH5 forwards all hub interface memory accesses that are not taken by integrated functions to PCI,
the ICH5 only uses this information for determining when not to accept cycles as a target.
This register must be initialized by the configuration software. For the purpose of address decode,
address bits A[19:0] are assumed to be 0. Thus, the bottom of the defined memory address range
will be aligned to a 1-MB boundary.
MEMLIM—Memory Limit Register
(HUB-PCI—D30:F0)
Offset Address:
Default Value:
This register defines the upper limit of the hub interface to PCI non-prefetchable memory range.
Since the ICH5 forwards all hub interface memory accesses to PCI, the ICH5 only uses this
information for determining when not to accept cycles as a target.
This register must be initialized by the config software. For the purpose of address decode, address
bits A[19:0] are assumed to be FFFFFh. Thus, the top of the defined memory address range will be
aligned to a 1-MB boundary.
PREF_MEM_BASE—Prefetchable Memory Base Register
(HUB-PCI—D30:F0)
Offset Address:
Default Value:
15:4
15:4
15:4
Bit
3:0
Bit
3:0
Bit
3:0
Prefetchable Memory Address Base
prefetchable memory address range for PCI. These 12 bits correspond to address bits 31:20.
Reserved.
Memory Address Base — R/W. This field defines the base of the memory range for PCI. These
12 bits correspond to address bits 31:20.
Reserved
Memory Address Limit — R/W. This field defines the top of the memory range for PCI. These
12 bits correspond to address bits 31:20.
Reserved.
20
FFF0h
22
0000h
24
FFF0h
–
–
–
21h
23h
25h
Hub Interface to PCI Bridge Registers (D30:F0)
—
R/W. This field defines the base address of the
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
R/W
16 bits
R/W
16 bits
R/W
16-bit
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