FW82801EB Intel, FW82801EB Datasheet - Page 341

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

9.1.34
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
FB_DEC_EN2—Flash BIOS Decode Enable 2 Register
(LPC I/F—D31:F0)
Offset Address:
Default Value:
This register determines which memory ranges will be decoded on the PCI bus and forwarded to
the flash BIOS. The ICH5 will subtractively decode cycles on PCI unless POS_DEC_EN is set to
1.
Bit
7:4
3
2
1
0
Reserved
FB_70_EN — R/W. Enables decoding two, 1-M flash BIOS memory ranges.
0 = Disable
1 = Enable the following ranges for the flash BIOS
FB_60_EN — R/W. Enables decoding two, 1-M flash BIOS memory ranges.
0 = Disable
1 = Enable the following ranges for the flash BIOS
FB_50_EN — R/W. Enables decoding two, 1-M flash BIOS memory ranges.
0 = Disable
1 = Enable the following ranges for the flash BIOS
FB_40_EN — R/W. Enables decoding two, 1-M flash BIOS memory ranges.
0 = Disable
1 = Enable the following ranges for the flash BIOS
FF70 0000h – FF7F FFFFh
FF30 0000h – FF3F FFFFh
FF60 0000h – FF6F FFFFh
FF20 0000h – FF2F FFFFh
FF50 0000h – FF5F FFFFh
FF10 0000h – FF1F FFFFh
FF40 0000h – FF4F FFFFh
FF00 0000h – FF0F FFFFh
F0h
0Fh
Description
LPC Interface Bridge Registers (D31:F0)
Attribute:
Size:
R/W
8 bits
341