FW82801EB Intel, FW82801EB Datasheet - Page 366

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.5.7
366
VER—Version Register
(LPC I/F—D31:F0)
Index Offset:
Default Value:
Each I/O APIC contains a hardwired Version Register that identifies different implementation of
APIC and their versions. The maximum redirection entry information also is in this register, to let
software know how many interrupt are supported by this APIC.
31:24
23:16
14:8
7:0
Bit
15
Reserved
Maximum Redirection Entries — RO. This is the entry number (0 being the lowest entry) of the
highest entry in the redirection table. It is equal to the number of interrupt input pins minus one and
is in the range 0 through 239. In the Intel
interrupts.
PRQ — RO. This bit is set to 1 to indicate that this version of the I/O APIC implements the IRQ
Assertion register and allows PCI devices to write to it to cause interrupts.
Reserved
Version — RO. This is a version number that identifies the implementation version.
01h
00170002h
®
ICH5 this field is hardwired to 17h to indicate 24
Description
Intel
Attribute:
Size:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
32 bits