FW82801EB Intel, FW82801EB Datasheet - Page 380

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

LPC Interface Bridge Registers (D31:F0)
9.8.4
9.8.5
9.8.6
380
STPCLK_DEL—Stop Clock Delay Register
(PM—D31:F0)
Offset Address:
Default Value:
Power Well:
USB_TDD—USB Transient Disconnect Detect
(PM—D31:F0)
Offset Address:
Default Value:
Power Well:
SATA_RD_CFG—SATA RAID Configuration
(PM—D31:F0) - (Intel
Offset Address:
Default Value:
Power Well:
Bit
Bit
Bit
7:6
5:0
7:2
1:0
7:6
5:0
Reserved
STPCLK_DEL — R/W. This field selects the value for t190 (CPUSLP# inactive to STPCLK#
inactive). The default value of 0Dh yields a default of approximately 50.045 microseconds. The
maximum value of 3Fh will result in a time of 245 microseconds.
NOTE: Software must program the value to a range that can be tolerated by the associated
Reserved
Transient Disconnect Detect (TDD) — R/W. This field prevents a short Single-Ended Zero (SE0)
condition on the USB ports from being interrupted by the UHCI host controller as a disconnect. BIOS
should set this field to 11b.
Integrated SATA RAID Configuration (RAID_CFG) — R/W. When cleared, Intel
Technology is disabled. These bits are reset by the assertion of the RSMRST# pin. These bits are
not reset when returning from S3.
00 = Intel RAID Technology Disabled
11 = Intel RAID Technology Enabled (default)
Reserved
processor and chipset. The Intel
00h or 01h; a minimum programming of 02h yields the minimum possible delay of
3.87 microseconds.
A8h
0Dh
Core
ADh
00h
Resume
AEh
C0h
Resume
®
82801ER ICH5R Only)
®
ICH5 requires that software does not program a value of
Intel
Description
Description
Description
Attribute:
Size:
Usage:
Attribute:
Size:
Attribute:
Size:
Usage:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
R/W
8-bit
ACPI Legacy
R/W
8-bit
R/W
8-bit
ICH5R Only
®
RAID