FW82801EB Intel, FW82801EB Datasheet - Page 420

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

IDE Controller Registers (D31:F1)
10.1.8
10.1.9
10.1.10
.
420
PCMD_BAR—Primary Command Block Base Address
BCC—Base Class Code Register
(IDE—D31:F1)
Address Offset:
Default Value:
PMLT—Primary Master Latency Timer Register
(IDE—D31:F1)
Address Offset:
Default Value:
Register (IDE—D31:F1)
Address Offset:
Default Value:
NOTE: This 8-byte I/O space is used in native mode for the Primary Controller’s Command Block.
31:16
15:3
Bit
2:1
Bit
7:0
Bit
7:0
0
Reserved
Base Address — R/W. Base address of the I/O space (8 consecutive I/O locations).
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
Base Class Code (BCC) — RO.
01 = Mass storage device
Master Latency Timer Count (MLTC) — RO.
00h =Hardwired. The IDE controller is implemented internally, and is not arbitrated as a PCI device,
so it does not need a Master Latency Timer.
0Bh
01h
0Dh
00h
10h
00000001h
–
13h
Intel
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
RO
8 bits
RO
8 bits
R/W, RO
32 bits