FW82801EB Intel, FW82801EB Datasheet - Page 462

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

UHCI Controllers Registers
12.1.1
12.1.2
12.1.3
462
VID—Vendor Identification Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
DID—Device Identification Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
PCICMD—PCI Command Register
(USB—D29:F0/F1/F2/F3)
Address Offset:
Default Value:
15:11
15:0
15:0
Bit
Bit
Bit
10
9
8
7
6
5
4
3
2
1
0
Device ID — RO. This is a 16-bit value assigned to the Intel
Reserved
Interrupt Disable — R/W.
0 = Enable. The function is able to generate its interrupt to the interrupt controller.
1 = Disable. The function is not capable of generating interrupts.
NOTE: The corresponding Interrupt Status bit is not affected by the interrupt enable.
Fast Back to Back Enable (FBE) — RO. Hardwired to 0.
SERR# Enable — RO. Reserved as 0.
Wait Cycle Control (WCC) — RO. Hardwired to 0.
Parity Error Response (PER) — RO. Hardwired to 0.
VGA Palette Snoop (VPS) — RO. Hardwired to 0.
Postable Memory Write Enable (PMWE) — RO. Hardwired to 0.
Special Cycle Enable (SCE) — RO. Hardwired to 0.
Bus Master Enable (BME) — R/W.
0 = Disable
1 = Enable. Intel
Memory Space Enable (MSE) — RO. Hardwired to 0.
I/O Space Enable (IOSE) — R/W. This bit controls access to the I/O space registers.
0 = Disable
1 = Enable accesses to the USB I/O registers. The Base Address register for USB should be
Vendor ID — RO. This is a 16-bit value assigned to Intel
programmed before this bit is set.
00
8086h
02
UHCI #1 = 24D2h
UHCI #2 = 24D4h
UHCI #3 = 24D7h
UHCI #4 = 24DEh
04
0400h
®
ICH5 can act as a master on the PCI bus for USB transfers.
–
–
–
01h
03h
05h
Description
Description
Intel
Description
®
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
82801EB ICH5 / 82801ER ICH5R Datasheet
®
ICH5 USB host controllers
RO
16 bits
R/W, RO
16 bits
RO
16 bits