FW82801EB Intel, FW82801EB Datasheet - Page 487

• Manufacturer Part Number: FW82801EB
• Manufacturer: Intel

Specifications of FW82801EB

• Lead Free Status / RoHS Status: Not Compliant

13.1.18
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
PWR_CAP—Power Management Capabilities Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
NOTES:
1. Normally, this register is read-only to report capabilities to the power management software. To report
2. Reset: core well, but not D3-to-D0 warm reset.
15:11
Bit
8:6
2:0
different power management capabilities, depending on the system in which the ICH5 is used, bits 15:11 and
8:6 in this register are writable when the WRT_RDONLY bit is set. The value written to this register does not
affect the hardware other than changing the value returned during a read.
10
9
5
4
3
PME Support (PME_SUP) — R/W (special). This 5-bit field indicates the power states in which the
function may assert PME#. The Intel
states, the ICH5 EHC is capable of generating PME#. Software should never need to modify this
field.
D2 Support (D2_SUP) — R/W (special).
0 = D2 State is not supported
1 = D2 State is supported
D1 Support (D1_SUP) — R/W (special).
0 = D1 State is not supported
1 = D1 State is supported
Auxiliary Current (AUX_CUR) — R/W (special). The ICH5 EHC reports 375 mA maximum
Suspend well current required when in the D3 cold state. This value can be written by BIOS when a
more accurate value is known.
Device Specific Initialization (DSI )— R/W (special). The ICH5 reports 0, indicating that no
device-specific initialization is required.
Reserved
PME Clock (PME_CLK) — R/W (special). The ICH5 reports 0, indicating that no PCI clock is
required to generate PME#.
Version (VER) — R/W (special). The ICH5 reports 010b, indicating that it complies with the PCI
Power Management Specification, Revision 1.1
52
C9C2h
–
53h
®
ICH5 EHC does not support the D1 or D2 states. For all other
Description
Attribute:
Size:
EHCI Controller Registers (D29:F7)
R/W (special)
16 bits
487